diff options
| author | Takahisa Tanaka <mc74hc00@gmail.com> | 2013-01-14 11:01:57 +0900 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-03-14 11:26:10 -0700 |
| commit | cc3edac76f8f5e8b0217874f80c0cb6b0774ee7a (patch) | |
| tree | 4d0dd42017dadece740ff069bc8bb7317b665326 | |
| parent | f328def5abd814b392fe4dda89ca8a72eff26261 (diff) | |
watchdog: sp5100_tco: Fix wrong indirect I/O access for getting value of reserved bits
commit 10ab329b5db7e592a3a60b4594e4e5f40b60c45c upstream.
In case of SB800 or later chipset and re-programming MMIO address(*),
sp5100_tco module may read incorrect value of reserved bit, because the module
reads a value from an incorrect I/O address. However, this bug doesn't cause
a problem, because when re-programming MMIO address, by chance the module
writes zero (this is BIOS's default value) to the low three bits of register.
* In most cases, PC with SB8x0 or later chipset doesn't need to re-programming
MMIO address, because such PC can enable AcpiMmio and can use 0xfed80b00 for
watchdog register base address.
This patch fixes this bug.
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43176
Signed-off-by: Takahisa Tanaka <mc74hc00@gmail.com>
Tested-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/watchdog/sp5100_tco.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/watchdog/sp5100_tco.c b/drivers/watchdog/sp5100_tco.c index 2b0e000d4377..5dfe86ebdc8b 100644 --- a/drivers/watchdog/sp5100_tco.c +++ b/drivers/watchdog/sp5100_tco.c @@ -500,14 +500,15 @@ static unsigned char sp5100_tco_setupdevice(void) /* Restore to the low three bits, if chipset is SB8x0(or later) */ if (sp5100_tco_pci->revision >= 0x40) { u8 reserved_bit; - reserved_bit = inb(base_addr) & 0x7; + outb(base_addr+0, index_reg); + reserved_bit = inb(data_reg) & 0x7; val |= (u32)reserved_bit; } /* Re-programming the watchdog timer base address */ outb(base_addr+0, index_reg); /* Low three bits of BASE are reserved */ - outb((val >> 0) & 0xf8, data_reg); + outb((val >> 0) & 0xff, data_reg); outb(base_addr+1, index_reg); outb((val >> 8) & 0xff, data_reg); outb(base_addr+2, index_reg); |