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authorMax Krummenacher <max.krummenacher@toradex.com>2019-02-05 12:52:14 +0100
committerMax Krummenacher <max.krummenacher@toradex.com>2019-02-11 18:43:56 +0100
commit4c51b1458c3fa610f50ffbbd733ad0fee43000b2 (patch)
tree32fabe6733a30fb4377139767b83bd8e69364867
parent83e9d5f5eae70f447252272aac347333175a247f (diff)
fsl-imx8qxp-colibri-dsihdmi-eval-v3.dts: add dts for lt8912
While at it add the new device trees to the Makefile. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
-rw-r--r--arch/arm64/boot/dts/freescale/Makefile4
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-dsihdmi-eval-v3.dts146
2 files changed, 149 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 06d6f3d2136c..afc64105e072 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -91,7 +91,9 @@ dtb-$(CONFIG_ARCH_FSL_IMX8QXP) += fsl-imx8qxp-lpddr4-arm2.dtb \
fsl-imx8qxp-ddr3l-val.dtb \
fsl-imx8dx-lpddr4-arm2.dtb \
fsl-imx8dxp-lpddr4-arm2.dtb \
- fsl-imx8qxp-colibri-eval-v3.dtb
+ fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb \
+ fsl-imx8qxp-colibri-eval-v3.dtb \
+ fsl-imx8qxp-colibri-lvds-dual-eval-v3.dtb
dtb-$(CONFIG_ARCH_FSL_IMX8MQ) += fsl-imx8mq-ddr3l-arm2.dtb \
fsl-imx8mq-ddr4-arm2.dtb \
fsl-imx8mq-ddr4-arm2-gpmi-nand.dtb \
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-dsihdmi-eval-v3.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-dsihdmi-eval-v3.dts
new file mode 100644
index 000000000000..97aacb13ef59
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-dsihdmi-eval-v3.dts
@@ -0,0 +1,146 @@
+/*
+ * Copyright (C) 2018, Toradex AG
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+//#define IS_A0_SILICON
+
+#include "fsl-imx8qxp-colibri-eval-v3.dtsi"
+
+/ {
+ model = "Toradex Colibri iMX8QXP with LT8912 MIPI-DSI 2 HDMI bridge";
+ compatible = "toradex,imx8qxp-colibri-dsihdmi", "toradex,imx8qxp-colibri", "fsl,imx8qxp";
+
+};
+
+/* DSI/LVDS port 0 */
+&i2c0_mipi_lvds0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0_mipi_lvds0>;
+ clock-frequency = <100000>;
+ status = "okay";
+
+ lt8912@48 {
+ compatible = "lontium,lt8912";
+ reg = <0x48>;
+
+ port {
+ lt8912_1_in: endpoint {
+ remote-endpoint = <&mipi_dsi_bridge1_out>;
+ };
+ };
+
+ display-timings {
+ native-mode = <&timing1>;
+
+ timing0: timing0 {
+ clock-frequency = <74250000>;
+ hactive = <1280>;
+ vactive = <720>;
+ hfront-porch = <110>;
+ hsync-len = <40>;
+ hback-porch = <220>;
+ vfront-porch = <5>;
+ vsync-len = <5>;
+ vback-porch = <20>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <0>;
+ };
+ timing1: timing1 {
+ clock-frequency = <148500000>;
+ hactive = <1920>;
+ vactive = <1080>;
+ hfront-porch = <88>;
+ hsync-len = <44>;
+ hback-porch = <148>;
+ vfront-porch = <36>;
+ vsync-len = <5>;
+ vback-porch = <4>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <0>;
+ };
+ };
+ };
+
+};
+
+&ldb1_phy {
+ status = "disabled";
+};
+
+&ldb1 {
+ status = "disabled";
+
+ lvds-channel@0 {
+ fsl,data-mapping = "jeida";
+ fsl,data-width = <24>;
+ status = "disabled";
+ };
+};
+
+&mipi_dsi_phy1 {
+ status = "okay";
+};
+
+&mipi_dsi1 {
+ pwr-delay = <10>;
+ status = "okay";
+};
+
+&mipi_dsi_bridge1 {
+ status = "okay";
+
+ port@1 {
+ mipi_dsi_bridge1_out: endpoint {
+ remote-endpoint = <&lt8912_1_in>;
+ };
+ };
+};
+
+/* DSI/LVDS port 1 */
+&i2c0_mipi_lvds1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0_mipi_lvds1>;
+ clock-frequency = <100000>;
+ status = "disabled";
+};
+
+&ldb2_phy {
+ status = "disabled";
+};
+
+&ldb2 {
+ status = "disabled";
+};
+
+&mipi_dsi_phy2 {
+ status = "disabled";
+};
+
+&mipi_dsi2 {
+ pwr-delay = <10>;
+ status = "disabled ";
+};
+
+&mipi_dsi_bridge2 {
+ status = "disabled";
+};
+