diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2019-02-14 17:17:17 +0100 |
|---|---|---|
| committer | Max Krummenacher <max.krummenacher@toradex.com> | 2019-02-14 19:30:17 +0100 |
| commit | 423a68cc5033223e3dc658dcc7c5eff0263a7656 (patch) | |
| tree | 1cfcdc298b180acba4886bf06c663e7d0e6d5bda | |
| parent | d8f13812c49a7ddc7c35ec947b457f15623625bb (diff) | |
fsl-imx8qxp-colibri-eval-v3.dtsi: fix eth0 on b0 silicon
Correctly set the magic register COMP_CTL* for ENET0.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi index 96fa5c99cd18..f9ccb77b8f0e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi @@ -133,6 +133,8 @@ pinctrl_fec1: fec1grp { fsl,pins = < + SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB0_PAD 0x000014a0 + SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB1_PAD 0x000014a0 SC_P_ENET0_MDC_CONN_ENET0_MDC 0x06000020 SC_P_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x00000061 |