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authorPhilippe Schenker <philippe.schenker@toradex.com>2023-02-28 17:31:14 +0100
committerPhilippe Schenker <philippe.schenker@toradex.com>2023-03-14 14:09:05 +0100
commitba08b54125898c0d5f770c54c7d7d928b2314c49 (patch)
tree9afa48c80078124daa85d349dc2a3949036bad01
parentc599c719779a47bc18b1a23932889eb5dfce1bd8 (diff)
arm64: dts: colibri-imx8x: Split pinctrl_hog1
Split pinctrl_hog1 into a second group so CSI_MCLK can be muxed to a gpio on its own. Upstream-Status: Submitted [https://lore.kernel.org/linux-devicetree/20230314102410.424773-7-dev@pschenker.ch/T/#u] Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
-rw-r--r--arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi7
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
index a352246aa1f3..10dce84dc153 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
@@ -119,7 +119,8 @@
&iomuxc {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>;
+ pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
+ <&pinctrl_hog2>;
/* On-module touch pen-down interrupt */
pinctrl_ad7879_int: ad7879intgrp {
@@ -253,6 +254,10 @@
<IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20>; /* SODIMM 93 */
};
+ pinctrl_hog2: hog2grp {
+ fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20>; /* SODIMM 75 */
+ };
+
/*
* This pin is used in the SCFW as a UART. Using it from
* Linux would require rewritting the SCFW board file.