diff options
| author | Philippe Schenker <philippe.schenker@toradex.com> | 2023-03-15 16:29:41 +0100 |
|---|---|---|
| committer | Philippe Schenker <philippe.schenker@toradex.com> | 2023-03-15 16:29:41 +0100 |
| commit | 2759afc24f9ae38e69368c44cdfa7fd86862681d (patch) | |
| tree | aff11c5c96adba07db1e0ac1f4c22a75aaedacef | |
| parent | d181bed84a651cc0cb7749434fbc579a0b4cfb6c (diff) | |
arm64: dts: colibri-imx8x: Add 50mhz clock for eth
Change ent0_lpcg accordingly so we get the clock we need for 100mbps
ethernet. This was copied from toradex_5.4-2.3.x-imx and checked that
it's still valid on 5.15 downstream
Upstream-Status: Pending
This may get upstreamed since on mainline there is a simliar define
(IMX_SC_C_DISABLE_50).
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi index fc40ef9316f7..6e76e8b34710 100644 --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi @@ -432,6 +432,21 @@ pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>; }; +&enet0_lpcg { + clocks = <&clk IMX_SC_R_ENET_0 IMX_SC_PM_CLK_PER>, + <&clk IMX_SC_R_ENET_0 IMX_SC_PM_CLK_PER>, + <&conn_axi_clk>, + <&clk IMX_SC_R_ENET_0 IMX_SC_C_DISABLE_50>, + <&conn_ipg_clk>, + <&conn_ipg_clk>; + clock-output-names = "enet0_lpcg_timer_clk", + "enet0_lpcg_txc_sampling_clk", + "enet0_lpcg_ahb_clk", + "enet0_lpcg_ref_50mhz_clk", + "enet0_lpcg_ipg_clk", + "enet0_lpcg_ipg_s_clk"; +}; + /* Colibri FastEthernet */ &fec1 { pinctrl-names = "default", "sleep"; |