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authorAlexander Stein <alexander.stein@ew.tq-group.com>2022-02-18 16:27:05 +0100
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2022-11-02 14:20:54 +0100
commit6b5f20acab66c5cd9cbcadd85e1e817b2054923e (patch)
tree9b52a49bec22681486648e9804bc887eb4307b71
parentf4a6c6324b5d6d4b63e21f1604fd5b1ea4ccf887 (diff)
dt-bindings: usb: dwc3-imx8mp: Add imx8mp specific flags
This adds bindings for features in the USB glue block. They allow setting polarity of PWR and OC as well as disabling port power control. Also permanently attached can be annotated as well. Additional IO address and clock are needed. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Link: https://lore.kernel.org/r/20220218152707.2198357-3-alexander.stein@ew.tq-group.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Upstream-status: Backport [d600d31e37dc50c4a99f3e73f8b467ea33f1475f]
-rw-r--r--Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml31
1 files changed, 27 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml
index 974032b1fda0..01ab0f922ae8 100644
--- a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml
@@ -15,9 +15,9 @@ properties:
const: fsl,imx8mp-dwc3
reg:
- maxItems: 1
- description: Address and length of the register set for the wrapper of
- dwc3 core on the SOC.
+ items:
+ - description: Address and length of the register set for HSIO Block Control
+ - description: Address and length of the register set for the wrapper of dwc3 core on the SOC.
"#address-cells":
enum: [ 1, 2 ]
@@ -49,6 +49,28 @@ properties:
- const: hsio
- const: suspend
+ fsl,permanently-attached:
+ type: boolean
+ description:
+ Indicates if the device atached to a downstream port is
+ permanently attached.
+
+ fsl,disable-port-power-control:
+ type: boolean
+ description:
+ Indicates whether the host controller implementation includes port
+ power control. Defines Bit 3 in capability register (HCCPARAMS).
+
+ fsl,over-current-active-low:
+ type: boolean
+ description:
+ Over current signal polarity is active low.
+
+ fsl,power-active-low:
+ type: boolean
+ description:
+ Power pad (PWR) polarity is active low.
+
# Required child node:
patternProperties:
@@ -74,7 +96,8 @@ examples:
#include <dt-bindings/interrupt-controller/arm-gic.h>
usb3_0: usb@32f10100 {
compatible = "fsl,imx8mp-dwc3";
- reg = <0x32f10100 0x8>;
+ reg = <0x32f10100 0x8>,
+ <0x381f0000 0x20>;
clocks = <&clk IMX8MP_CLK_HSIO_ROOT>,
<&clk IMX8MP_CLK_USB_ROOT>;
clock-names = "hsio", "suspend";