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authorJihoon Bang <jbang@nvidia.com>2012-06-29 13:54:34 -0700
committerRohan Somvanshi <rsomvanshi@nvidia.com>2012-07-11 06:41:09 -0700
commitec165877819d4b2077a3b96a070bab825a62d7cf (patch)
tree8b43805affbc8679144b6816d2900f0cd853f63c
parentdd4018153b7cee324bb2812c74109a4deb1ad796 (diff)
arm: tegra: cardhu: move VI to PLL_P
As a part of effort to bring in 437MHz clock frequency in EMC, We need to move VI from PLL_M to PLL_P. Bug 1005576 Signed-off-by: Jihoon Bang <jbang@nvidia.com> Reviewed-on: http://git-master/r/112704 (cherry picked from commit c175857e80355857b55e8eb2012c12e94e532835) Change-Id: Icd314c01625f5c4765b0215735ceafb7d3f25d1e Reviewed-on: http://git-master/r/114241 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/board-cardhu.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/board-cardhu.c b/arch/arm/mach-tegra/board-cardhu.c
index 402d8dd8b193..1fa3f4f82ef2 100644
--- a/arch/arm/mach-tegra/board-cardhu.c
+++ b/arch/arm/mach-tegra/board-cardhu.c
@@ -1,7 +1,7 @@
/*
* arch/arm/mach-tegra/board-cardhu.c
*
- * Copyright (c) 2011-2012, NVIDIA Corporation.
+ * Copyright (c) 2011-2012, NVIDIA Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -234,6 +234,7 @@ static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
{ "i2c3", "pll_p", 3200000, false},
{ "i2c4", "pll_p", 3200000, false},
{ "i2c5", "pll_p", 3200000, false},
+ { "vi", "pll_p", 0, false},
{ NULL, NULL, 0, 0},
};