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authorAlex Frid <afrid@nvidia.com>2011-05-13 15:01:53 -0700
committerVarun Colbert <vcolbert@nvidia.com>2011-05-18 11:47:34 -0700
commit48c4b1688bf22d263e691d11365e0078b6ddef97 (patch)
tree8036e12ab54e5f8800dad3efe0d1f086def331db
parentdbbefa6150f6ae1de38b3e41f33ac2f8b311c3a2 (diff)
ARM: tegra: power: Enable Tegra3 CPU EDP by default
Change-Id: I62ad3b3b7e0b4feba223c0dfe5792194aea6e4cd Reviewed-on: http://git-master/r/31616 Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/Kconfig1
-rw-r--r--arch/arm/mach-tegra/tegra3_clocks.c7
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 101b5adae30f..9a7c4c1e0697 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -236,6 +236,7 @@ config TEGRA_MC_PROFILE
config TEGRA_EDP_LIMITS
bool "Enforce electrical design limits"
depends on CPU_FREQ
+ default y if ARCH_TEGRA_3x_SOC
default n
help
Limit maximum CPU frequency based on temperature and number
diff --git a/arch/arm/mach-tegra/tegra3_clocks.c b/arch/arm/mach-tegra/tegra3_clocks.c
index 5fda1706103d..25e05bee7264 100644
--- a/arch/arm/mach-tegra/tegra3_clocks.c
+++ b/arch/arm/mach-tegra/tegra3_clocks.c
@@ -3598,6 +3598,10 @@ struct clk *tegra_ptr_clks[] = {
&tegra_clk_emc,
};
+static struct tegra_edp_limits default_cpu_edp_limits[] = {
+ {90, { 1000000, 1000000, 1000000, 1000000 } },
+};
+
static void tegra3_init_one_clock(struct clk *c)
{
clk_init(c);
@@ -3641,6 +3645,9 @@ void __init tegra_soc_init_clocks(void)
init_clk_out_mux();
for (i = 0; i < ARRAY_SIZE(tegra_clk_out_list); i++)
tegra3_init_one_clock(&tegra_clk_out_list[i]);
+
+ tegra_init_cpu_edp_limits(default_cpu_edp_limits,
+ ARRAY_SIZE(default_cpu_edp_limits));
}
#ifdef CONFIG_CPU_FREQ