Merge change Ib750c4c0 into android-tegra-2.6.29

* changes:
  tegra RM: add nvmem= command-line parsing for carveout aperture(s)

3 files changed, 76 insertions, 4 deletions

diff --git a/arch/arm/mach-tegra/include/nvbootargs.h b/arch/arm/mach-tegra/include/nvbootargs.h
index 7cfa00f3506a..7dc32a8a3204 100644
--- a/arch/arm/mach-tegra/include/nvbootargs.h
+++ b/arch/arm/mach-tegra/include/nvbootargs.h
@@ -59,6 +59,7 @@ typedef enum
     NvBootArgKey_Framebuffer,
     NvBootArgKey_ChipShmoo,
     NvBootArgKey_ChipShmooPhys,
+    NvBootArgKey_Carveout,
     NvBootArgKey_PreservedMemHandle_0 = 0x10000,
     NvBootArgKey_PreservedMemHandle_Num = (NvBootArgKey_PreservedMemHandle_0 +
                                          NV_BOOTARGS_MAX_PRESERVED_MEMHANDLES),
@@ -76,6 +77,16 @@ typedef struct NvBootArgsRmRec
 } NvBootArgsRm;
 
 /**
+ * Carveout boot args, which define the physical memory location of the GPU
+ * carved-out memory region(s).
+ */
+typedef struct NvBootArgsCarveoutRec
+{
+    NvUPtr base;
+    NvU32 size;
+} NvBootArgsCarveout;
+
+/**
  * PreservedMemHandle boot args, indexed by PreservedMemHandle_0 + n.
  * All values n from 0 to the first value which does not return NvSuccess will
  * be quered at RM initialization in the OS environment.  If present, a new
diff --git a/arch/arm/mach-tegra/nvos/nvos.c b/arch/arm/mach-tegra/nvos/nvos.c
index 4049772c890a..057f1e665676 100644
--- a/arch/arm/mach-tegra/nvos/nvos.c
+++ b/arch/arm/mach-tegra/nvos/nvos.c
@@ -1659,6 +1659,7 @@ NvError NvOsBootArgSet(NvU32 key, void *arg, NvU32 size)
     return NvError_NotImplemented;
 }
 
+static NvError NvOsGetCarveoutParam(NvBootArgsCarveout* arg, NvU32 size);
 NvError NvOsBootArgGet(NvU32 key, void *arg, NvU32 size)
 {
     const void *src;
@@ -1696,6 +1697,8 @@ NvError NvOsBootArgGet(NvU32 key, void *arg, NvU32 size)
             src = &s_BootArgs.ChipShmooPhysArgs;
             size_src = sizeof(NvBootArgsChipShmooPhys);
             break;
+        case NvBootArgKey_Carveout:
+            return NvOsGetCarveoutParam((NvBootArgsCarveout*)arg, size);
         default:
             src = NULL;
             size_src = 0;
@@ -1758,6 +1761,50 @@ void NvOsSetResourceAllocFileLine(void* userptr, const char* file, int line)
 }
 #endif
 
+#define MAX_CARVEOUTS 2
+
+static int gs_NumCarveouts = 0;
+
+typedef struct CarveoutRegionRec {
+    unsigned long base;
+    unsigned long size;
+} CarveoutRegion;
+
+static CarveoutRegion gs_Carveouts[MAX_CARVEOUTS];
+
+static NvError NvOsGetCarveoutParam(NvBootArgsCarveout* arg, NvU32 size)
+{
+    if (size != sizeof(*arg))
+        return NvError_BadParameter;
+
+    if (!gs_NumCarveouts)
+        return NvError_NotSupported;
+
+    arg->base = gs_Carveouts[0].base;
+    arg->size = gs_Carveouts[0].size;
+    return NvSuccess;
+}
+
+static int __init carveout_memory_setup(char *options)
+{
+    unsigned long start, size;
+    char *p = options;
+
+    start = -1;
+    size = memparse(p, &p);
+    if (*p == '@')
+        start = memparse(p + 1, &p);
+
+    if (gs_NumCarveouts < NV_ARRAY_SIZE(gs_Carveouts))
+    {
+        gs_Carveouts[gs_NumCarveouts].base = start;
+        gs_Carveouts[gs_NumCarveouts++].size = size;
+    }
+
+    return 0;
+}
+__setup("nvmem=", carveout_memory_setup);
+
 static int __init parse_tegra_tag(const struct tag *tag)
 {
     const struct tag_nvidia_tegra *nvtag = &tag->u.tegra;
diff --git a/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_init.c b/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_init.c
index 915a9a8f998f..c5f849c6da98 100644
--- a/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_init.c
+++ b/arch/arm/mach-tegra/nvrm/core/ap15/ap15rm_init.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2007-2009 NVIDIA Corporation.
+ * Copyright (c) 2007-2010 NVIDIA Corporation.
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -56,6 +56,7 @@
 #include "ap15/arapbpm.h"
 #include "nvrm_pinmux_utils.h"
 #include "ap15/arfuse.h"
+#include "nvbootargs.h"
 
 static NvRmDevice gs_Rm;
 
@@ -276,9 +277,22 @@ NvRmOpenNew(NvRmDeviceHandle *pHandle)
     rm->bBasicInit = NV_TRUE;
     rm->bPreInit = NV_TRUE;
 
-    CarveoutSize     = NvOdmQueryCarveoutSize();
-    CarveoutBaseAddr = rm->ExtMemoryInfo.base +
-            NvOdmQueryMemSize(NvOdmMemoryType_Sdram) - CarveoutSize;
+
+    {
+        NvBootArgsCarveout Carveout;
+        if (NvOsBootArgGet(NvBootArgKey_Carveout, &Carveout,
+            sizeof(Carveout)) == NvSuccess)
+        {
+            CarveoutSize = Carveout.size;
+            CarveoutBaseAddr = (NvU32) Carveout.base;
+        }
+        else
+        {
+            CarveoutSize = NvOdmQueryCarveoutSize();
+            CarveoutBaseAddr = rm->ExtMemoryInfo.base +
+                NvOdmQueryMemSize(NvOdmMemoryType_Sdram) - CarveoutSize;
+        }
+    }
 
     NvRmPrivHeapCarveoutInit(CarveoutSize, CarveoutBaseAddr);
     NvRmPrivHeapIramInit(rm->IramMemoryInfo.size, rm->IramMemoryInfo.base);