Merge change I782bff14 into android-tegra-2.6.29

* changes:
  Tegra: Disable PCIe power rails when CONFIG_TEGRA_PCI is not enabled.

2 files changed, 39 insertions, 32 deletions

diff --git a/arch/arm/mach-tegra/board_nvodm.c b/arch/arm/mach-tegra/board_nvodm.c
index 5fa01becb3e1..0f300a22e134 100644
--- a/arch/arm/mach-tegra/board_nvodm.c
+++ b/arch/arm/mach-tegra/board_nvodm.c
@@ -47,6 +47,7 @@
 #include "nvrm_interrupt.h"
 #include "nvrm_pinmux.h"
 #include "nvrm_power.h"
+#include "nvrm_pmu.h"
 #include "nvodm_query.h"
 #include "nvodm_services.h"
 #include "nvodm_sdio.h"
@@ -275,6 +276,34 @@ static void __init NvConfigDebugConsole(
     return;
 }
 
+static void __init pci_tegra_power(int on)
+{
+	u32 settling_time;
+	const NvOdmPeripheralConnectivity *con = NULL;
+	int i;
+
+	con = NvOdmPeripheralGetGuid(NV_VDD_PEX_CLK_ODM_ID);
+	if (con == NULL)
+		return;
+
+	for (i = 0; i < con->NumAddress; i++) {
+		if (con->AddressList[i].Interface != NvOdmIoModule_Vdd)
+			continue;
+		if (on) {
+			NvRmPmuVddRailCapabilities rail;
+			NvRmPmuGetCapabilities(s_hRmGlobal,
+				con->AddressList[i].Address, &rail);
+			NvRmPmuSetVoltage(s_hRmGlobal,
+				con->AddressList[i].Address,
+				rail.requestMilliVolts, &settling_time);
+		} else
+			NvRmPmuSetVoltage(s_hRmGlobal,
+				con->AddressList[i].Address, NVODM_VOLTAGE_OFF,
+				&settling_time);
+		udelay(settling_time);
+	}
+}
+
 extern void __init tegra_common_init(void);
 extern void __init tegra_clk_init(void);
 #ifdef CONFIG_TEGRA_DPRAM
@@ -337,7 +366,8 @@ static void __init register_enc28j60(void)
     /* Check if the SPI is configured as a master for this instance
      * If it it not, don't register the device.
      * */
-    pSpiDeviceInfo = NvOdmQuerySpiGetDeviceInfo(NvOdmIoModule_Spi, instance, cs);
+    pSpiDeviceInfo = NvOdmQuerySpiGetDeviceInfo(NvOdmIoModule_Spi, instance,
+	cs);
     if (pSpiDeviceInfo && pSpiDeviceInfo->IsSlave)
         return;
 
@@ -443,6 +473,13 @@ static void __init tegra_machine_init(void)
 #ifdef CONFIG_TEGRA_ODM_RFKILL
     (void) platform_device_register(&tegra_rfkill);
 #endif
+
+#ifdef CONFIG_TEGRA_PCI
+	pci_tegra_power(1);
+#else
+	pci_tegra_power(0);
+#endif
+
 }
 
 MACHINE_START(TEGRA_GENERIC, "Tegra generic")
diff --git a/arch/arm/mach-tegra/pci.c b/arch/arm/mach-tegra/pci.c
index 40a46e13c443..d3a35916c603 100644
--- a/arch/arm/mach-tegra/pci.c
+++ b/arch/arm/mach-tegra/pci.c
@@ -58,8 +58,6 @@ static int pci_tegra_read_conf(struct pci_bus *bus, u32 devfn,
 
 static int __init pcie_tegra_init(void);
 
-
-static void pci_tegra_power(int on);
 static void pci_tegra_setup_translations(void);
 static irqreturn_t pci_tegra_isr(int irq, void *arg);
 static bool pci_tegra_check_rp(int rp);
@@ -207,7 +205,6 @@ static int __init pci_tegra_setup(int nr, struct pci_sys_data *data)
 
 	if (nr != 0) return 0;
 
-	pci_tegra_power(1);
 	if (NvRmSetModuleTristate(s_hRmGlobal,
 		NVRM_MODULE_ID(NvRmPrivModuleID_Pcie, 0), NV_FALSE)
 		!= NvSuccess) {
@@ -224,6 +221,7 @@ static int __init pci_tegra_setup(int nr, struct pci_sys_data *data)
 
 	if (NvRmPowerRegister(s_hRmGlobal, 0, &pci_tegra_powerid) != NvSuccess)
 		goto fail;
+
 	if (NvRmPowerModuleClockControl(s_hRmGlobal, NvRmPrivModuleID_Pcie,
 		pci_tegra_powerid, NV_TRUE) != NvSuccess)
 		goto fail;
@@ -413,34 +411,6 @@ static int __init pcie_tegra_init(void)
  *  PCIe support functions
  */
 
-static void pci_tegra_power(int on)
-{
-	u32 settling_time;
-	const NvOdmPeripheralConnectivity *con = NULL;
-	int i;
-
-	con = NvOdmPeripheralGetGuid(NV_VDD_PEX_CLK_ODM_ID);
-	if (con == NULL)
-		return;
-
-	for (i = 0; i < con->NumAddress; i++) {
-		if (con->AddressList[i].Interface != NvOdmIoModule_Vdd)
-			continue;
-		if (on) {
-			NvRmPmuVddRailCapabilities rail;
-			NvRmPmuGetCapabilities(s_hRmGlobal,
-				con->AddressList[i].Address, &rail);
-			NvRmPmuSetVoltage(s_hRmGlobal,
-				con->AddressList[i].Address,
-				rail.requestMilliVolts, &settling_time);
-		} else
-			NvRmPmuSetVoltage(s_hRmGlobal,
-				con->AddressList[i].Address, NVODM_VOLTAGE_OFF,
-				&settling_time);
-		udelay(settling_time);
-	}
-}
-
 static void pci_tegra_setup_translations(void)
 {
 	u32 fpci_bar;