diff options
| author | Gary King <gking@nvidia.com> | 2010-06-14 14:50:51 -0700 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-06-15 10:33:19 -0700 |
| commit | 9ed72b0880a3605863e3ec256fda069ec7165921 (patch) | |
| tree | 187fc7c934bc73fc76a416a23e5cf43cca23b362 | |
| parent | a241d7b07c2d88fc409a2756b12b80ce33ee2d44 (diff) | |
[ARM/tegra] suspend: fix lp0 scratch register mappings
fix a couple of typos in the lp0 scratch register mappings
Change-Id: If72859c592011fce8f356553bf1ab1ad8f5d43a7
Reviewed-on: http://git-master/r/2609
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/suspend-t2.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/suspend-t2.c b/arch/arm/mach-tegra/suspend-t2.c index 88aed2664489..ed1055687baf 100644 --- a/arch/arm/mach-tegra/suspend-t2.c +++ b/arch/arm/mach-tegra/suspend-t2.c @@ -73,7 +73,7 @@ static const struct pmc_scratch_field pllx[] __initdata = { field(CLK_RESET, 0xe4, 7:4, 21:18), /* PLLX_LFCON */ field(APB_MISC, 0x8e4, 27:24, 30:27), /* XM2CFGC_VREF_DQ */ field(APB_MISC, 0x8c8, 3:3, 26:26), /* XM2CFGC_SCHMT_EN */ - field(APB_MISC, 0x8c8, 2:2, 31:31), /* XM2CLKCFG_PREEMP_EN */ + field(APB_MISC, 0x8d0, 2:2, 31:31), /* XM2CLKCFG_PREEMP_EN */ }; static const struct pmc_scratch_field emc_0[] __initdata = { @@ -148,7 +148,7 @@ static const struct pmc_scratch_field emc_6[] __initdata = { field(EMC, 0xac, 3:0, 25:22), /* QUSE_EXTRA */ field(EMC, 0x98, 5:0, 21:16), /* TFAW */ field(APB_MISC, 0x8e4, 5:5, 30:30), /* XM2CFGC_VREF_DQ_EN */ - field(APB_MISC, 0x8e4, 7:7, 29:26), /* XM2CFGC_VREF_DQS */ + field(APB_MISC, 0x8e4, 19:16, 29:26), /* XM2CFGC_VREF_DQS */ }; static const struct pmc_scratch_field emc_dqsib_dly[] __initdata = { @@ -180,7 +180,7 @@ static const struct pmc_scratch_field emc_autocal_fbio[] __initdata = { }; static const struct pmc_scratch_field emc_autocal_interval[] __initdata = { - field(EMC, 0x2a8, 27:0, 27:8), /* AUTOCAL_INTERVAL */ + field(EMC, 0x2a8, 27:0, 27:0), /* AUTOCAL_INTERVAL */ field(EMC, 0x2b8, 1:1, 29:29), /* CLKCHANGE_PD_ENABLE */ field(EMC, 0x2b8, 0:0, 28:28), /* CLKCHANGE_REQ_ENABLE */ field(EMC, 0x2b8, 9:8, 31:30), /* PIN_CONFIG */ |