diff options
| author | Gary King <gking@nvidia.com> | 2010-06-11 14:17:17 -0700 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-06-11 16:42:25 -0700 |
| commit | 98d84729d9cc860e9fd275f89d8626829489c1cb (patch) | |
| tree | cda8ddefcd2b4a7fb8568a5156c8ea0476fe6c1e | |
| parent | 1912f6e6d95760555acb91929bcecf32313c973f (diff) | |
[ARM/tegra] dma: don't save & restore the channel status register
CHAN_STA is the interrupt status register (write-to-clear), so preserving
it across power transitions doesn't make a lot of sense
Change-Id: Ibf4d6da17da5afbbde7572295207844cca63d38a
Reviewed-on: http://git-master/r/2516
Reviewed-by: Gary King <gking@nvidia.com>
Tested-by: Gary King <gking@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/dma.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c index bbe3eef172bf..e14d14f084fb 100644 --- a/arch/arm/mach-tegra/dma.c +++ b/arch/arm/mach-tegra/dma.c @@ -756,7 +756,7 @@ fail: } #ifdef CONFIG_PM -static u32 apb_dma[6*TEGRA_SYSTEM_DMA_CH_NR + 3]; +static u32 apb_dma[5*TEGRA_SYSTEM_DMA_CH_NR + 3]; void tegra_dma_suspend(void) { @@ -773,7 +773,6 @@ void tegra_dma_suspend(void) TEGRA_APB_DMA_CH0_SIZE * i); *ctx++ = readl(addr + APB_DMA_CHAN_CSR); - *ctx++ = readl(addr + APB_DMA_CHAN_STA); *ctx++ = readl(addr + APB_DMA_CHAN_AHB_PTR); *ctx++ = readl(addr + APB_DMA_CHAN_AHB_SEQ); *ctx++ = readl(addr + APB_DMA_CHAN_APB_PTR); @@ -796,7 +795,6 @@ void tegra_dma_resume(void) TEGRA_APB_DMA_CH0_SIZE * i); writel(*ctx++, addr + APB_DMA_CHAN_CSR); - writel(*ctx++, addr + APB_DMA_CHAN_STA); writel(*ctx++, addr + APB_DMA_CHAN_AHB_PTR); writel(*ctx++, addr + APB_DMA_CHAN_AHB_SEQ); writel(*ctx++, addr + APB_DMA_CHAN_APB_PTR); |