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authorMichael Hsu <mhsu@nvidia.com>2010-05-21 12:41:35 -0700
committerGary King <gking@nvidia.com>2010-06-15 16:21:20 -0700
commit162f2d05be3d9a73e164524bcf0c541ca1e21a58 (patch)
tree220e23a4f83ab385364a50311020b6448c493b69
parentc2e3349c7b92e69714b9b9db7283779781eefae1 (diff)
[ARM/tegra] nvrm spi: use lazy disable for spi busy hint
SPI driver normally enables / disables CPU and bus frequency boost at the start / end of each SPI transaction. Instead of turning off frequency boost immediately at the end of each SPI transaction, use a timeout period after which frequency boost hints will time out. The timeout period is calculated based on the number of bytes in the SPI transaction and the SPI clock rate. The timeout insures that frequency boost is still active in between multiple SPI transactions. This has the side effect of increasing SPI data transfer rate for multiple SPI transactions. This was a cherry-pick from android-tegra-2.6.29 id: I088127ebb5ea07810dac824bfafd3f99ae6c96f2 and applied to the android-tegra-2.6.32. Change-Id: I765e892cb34a4fff8d8607cdf52cec065979c6e7 Reviewed-on: http://git-master/r/2338 Reviewed-by: Michael Hsu <mhsu@nvidia.com> Tested-by: Michael Hsu <mhsu@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c31
1 files changed, 17 insertions, 14 deletions
diff --git a/arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c b/arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c
index c9220113262f..d2ed962c6b3f 100644
--- a/arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c
+++ b/arch/arm/mach-tegra/nvrm/io/ap15/rm_spi_slink.c
@@ -799,7 +799,7 @@ RegisterSpiSlinkInterrupt(
&hIntHandlers, hRmSpiSlink, &hRmSpiSlink->SpiInterruptHandle, NV_TRUE));
}
// Boosting the Emc/Ahb/Apb/Cpu frequency
-static void BoostFrequency(NvRmSpiHandle hRmSpiSlink, NvBool IsBoost, NvU32 TransactionSize)
+static void BoostFrequency(NvRmSpiHandle hRmSpiSlink, NvBool IsBoost, NvU32 TransactionSize, NvU32 ClockSpeedInKHz)
{
if (IsBoost)
{
@@ -808,10 +808,18 @@ static void BoostFrequency(NvRmSpiHandle hRmSpiSlink, NvBool IsBoost, NvU32 Tran
if (!((hRmSpiSlink->IsPmuInterface) &&
(hRmSpiSlink->PmuChipSelectId == hRmSpiSlink->CurrTransferChipSelId)))
{
- hRmSpiSlink->BusyHints[0].BoostKHz = 80000; // Emc
- hRmSpiSlink->BusyHints[1].BoostKHz = 80000; // Ahb
- hRmSpiSlink->BusyHints[2].BoostKHz = 80000; // Apb
- hRmSpiSlink->BusyHints[3].BoostKHz = 240000; // Cpu
+ hRmSpiSlink->BusyHints[0].BoostKHz = 150000; // Emc
+ hRmSpiSlink->BusyHints[0].BoostDurationMs
+ = 10 + ((4 * (TransactionSize * 8))) / ClockSpeedInKHz;
+ hRmSpiSlink->BusyHints[1].BoostKHz = 150000; // Ahb
+ hRmSpiSlink->BusyHints[1].BoostDurationMs
+ = 10 + ((4 * (TransactionSize * 8))) / ClockSpeedInKHz;
+ hRmSpiSlink->BusyHints[2].BoostKHz = 150000; // Apb
+ hRmSpiSlink->BusyHints[2].BoostDurationMs
+ = 10 + ((4 * (TransactionSize * 8))) / ClockSpeedInKHz;
+ hRmSpiSlink->BusyHints[3].BoostKHz = 600000; // Cpu
+ hRmSpiSlink->BusyHints[3].BoostDurationMs
+ = 10 + ((4 * (TransactionSize * 8))) / ClockSpeedInKHz;
NvRmPowerBusyHintMulti(hRmSpiSlink->hDevice, hRmSpiSlink->RmPowerClientId,
hRmSpiSlink->BusyHints, 4,
NvRmDfsBusyHintSyncMode_Async);
@@ -894,7 +902,7 @@ static void DestroySpiSlinkChannelHandle(NvRmSpiHandle hRmSpiSlink)
#if NV_OAL
// Resetting the Emc/Ahb/Apb/Cpu frequency
- BoostFrequency(hRmSpiSlink, NV_FALSE, 0);
+ BoostFrequency(hRmSpiSlink, NV_FALSE, 0, 0);
(void)SetPowerControl(hRmSpiSlink, NV_FALSE);
#endif
@@ -2463,7 +2471,7 @@ void NvRmSpiMultipleTransactions(
TotalTransByte += pTrans->len;
}
- BoostFrequency(hRmSpi, NV_TRUE, TotalTransByte);
+ BoostFrequency(hRmSpi, NV_TRUE, TotalTransByte, ClockSpeedInKHz);
hRmSpi->CurrTransInfo.PacketsPerWord = PacketsPerWord;
if (SpiPinMap)
@@ -2594,7 +2602,6 @@ cleanup:
hRmSpi->IsApbDmaAllocated = NV_FALSE;
}
- BoostFrequency(hRmSpi, NV_FALSE, 0);
SetPowerControl(hRmSpi, NV_FALSE);
NvOsMutexUnlock(hRmSpi->hChannelAccessMutex);
NV_ASSERT(Error == NvSuccess);
@@ -2657,7 +2664,7 @@ void NvRmSpiTransaction(
Error = SetPowerControl(hRmSpi, NV_TRUE);
if (Error != NvSuccess)
goto cleanup;
- BoostFrequency(hRmSpi, NV_TRUE, BytesRequested);
+ BoostFrequency(hRmSpi, NV_TRUE, BytesRequested, ClockSpeedInKHz);
#else
hRmSpi->CurrTransferChipSelId = ChipSelectId;
@@ -2785,7 +2792,6 @@ cleanup:
}
#if !NV_OAL
- BoostFrequency(hRmSpi, NV_FALSE, 0);
SetPowerControl(hRmSpi, NV_FALSE);
NvOsMutexUnlock(hRmSpi->hChannelAccessMutex);
#endif
@@ -2875,7 +2881,7 @@ NvError NvRmSpiStartTransaction(
// Enable Power/Clock.
Error = SetPowerControl(hRmSpi, NV_TRUE);
if (!Error)
- BoostFrequency(hRmSpi, NV_TRUE, BytesRequested);
+ BoostFrequency(hRmSpi, NV_TRUE, BytesRequested, ClockSpeedInKHz);
if (!Error)
Error = SetChipSelectSignalLevel(hRmSpi, ChipSelectId, ClockSpeedInKHz,
@@ -2927,7 +2933,6 @@ cleanup:
if (hRmSpi->IsIdleSignalTristate)
NvRmPinMuxConfigSetTristate(hRmSpi->hDevice,hRmSpi->RmIoModuleId,
hRmSpi->InstanceId, hRmSpi->SpiPinMap, NV_TRUE);
- BoostFrequency(hRmSpi, NV_FALSE, 0);
SetPowerControl(hRmSpi, NV_FALSE);
NvOsMutexUnlock(hRmSpi->hChannelAccessMutex);
return Error;
@@ -2960,8 +2965,6 @@ NvRmSpiGetTransactionData(
NvRmPinMuxConfigSetTristate(hRmSpiSlink->hDevice,hRmSpiSlink->RmIoModuleId,
hRmSpiSlink->InstanceId, hRmSpiSlink->SpiPinMap, NV_TRUE);
- BoostFrequency(hRmSpiSlink, NV_FALSE, 0);
-
// Disable Power/Clock.
SetPowerControl(hRmSpiSlink, NV_FALSE);
NvOsMutexUnlock(hRmSpiSlink->hChannelAccessMutex);