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authorAbhishek Aggarwal <aaggarwal@nvidia.com>2010-04-27 20:06:55 +0530
committerYu-Huan Hsu <yhsu@nvidia.com>2010-04-27 19:15:16 -0700
commit55c82007cdef68d99212a01cff5ef7cf3ea10fc3 (patch)
tree6c5cf4fab8bdf12598bc2b77b08fe60dd9b9bb7b
parent1a6769405dbaa37775cf8ea0018f57d93d171319 (diff)
tegra usb: fine tuning CPU clock boost freq for USB device
The CPU clock was previously boosted to 300 MHz for USB device on cable connect for performance optimization. Following issues were noted with this setting: 1. it is above low limit (250MHz) used to turn off slave CPU. Hence it will never be turned off when cable is connected. 2. it is also above PLLP 216MHz output. Hence high power PLLX will be kept alive. Reducing the CPU boost frequency to 200 MHz to address the above issues with minimal impact on the performance. Bug 654486: [whistler/android] - Large difference in USB MSD perf with DFS OFF. Change-Id: Ia57db137b493dd8fe8436ede7942df0661dad67b Reviewed-on: http://git-master/r/1228 Tested-by: Abhishek Aggarwal <aaggarwal@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
-rw-r--r--[-rwxr-xr-x]arch/arm/mach-tegra/nvddk/nvddk_usbphy_priv.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/nvddk/nvddk_usbphy_priv.h b/arch/arm/mach-tegra/nvddk/nvddk_usbphy_priv.h
index 83e24c9c28dd..d4199b45983b 100755..100644
--- a/arch/arm/mach-tegra/nvddk/nvddk_usbphy_priv.h
+++ b/arch/arm/mach-tegra/nvddk/nvddk_usbphy_priv.h
@@ -63,7 +63,7 @@ enum {USB_HW_MIN_SYSTEM_FREQ_KH = 100000};
/**
* Minimum cpu frequency required for USB for optimal performance
*/
-enum {USB_HW_MIN_CPU_FREQ_KH = 300000};
+enum {USB_HW_MIN_CPU_FREQ_KH = 200000};
/**
* Wait time(1 second) for controller H/W status to change before giving up.