diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2010-04-07 13:10:18 -0700 |
|---|---|---|
| committer | Gary King <gking@nvidia.com> | 2010-04-07 13:17:50 -0700 |
| commit | 221ff969389192d4baab1a8e3caaffa906974514 (patch) | |
| tree | a3cc4a376ee3f6190eafad342d49efc8ff1933ba | |
| parent | b01be20bf4a6dd5273747cdda308bd24187de813 (diff) | |
tegra: Fixed native timer event time calculation
The native timer code to program the timer hardware for the next kernel
event was incorrectly rescaling the cycle count which was passed in by
the kernel. This would result in event periods 100000 times longer than
expected. This error would occur only when LOCAL_TIMERS were not configured.
Change-Id: I32a1593368510069afe1fb439465d6c9b696c4d3
Reviewed-on: http://git-master/r/1051
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/timer.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index f69dee4bf1ff..07810db19891 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c @@ -54,7 +54,7 @@ static int tegra_event_set_next(unsigned long cycles, struct tegra_timer *tmr = container_of(dev, struct tegra_timer, event); u32 reg; - reg = 0x80000000 | ((1000000/HZ)*(cycles+1)-1); + reg = 0x80000000 | ((cycles > 1) ? (cycles-1) : 0); writel(reg, tmr->mmio + TIMER_TMR_PTV_0); return 0; |