tegra:low power state selection based on ODMDATA for whistler and Harmony

Change-Id: I6969716342df0b28db1167df9bca50a5c03ffb2f
Reviewed-on: http://git-master/r/1138
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Tested-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>

4 files changed, 27 insertions, 18 deletions

diff --git a/arch/arm/mach-tegra/odm_kit/query/harmony/nvodm_query.c b/arch/arm/mach-tegra/odm_kit/query/harmony/nvodm_query.c
index 6a6cfdb61501..f0c1c886c4f7 100644
--- a/arch/arm/mach-tegra/odm_kit/query/harmony/nvodm_query.c
+++ b/arch/arm/mach-tegra/odm_kit/query/harmony/nvodm_query.c
@@ -687,17 +687,27 @@ NvBool NvOdmQueryGetPmuProperty(NvOdmPmuProperty* pPmuProperty)
  */
 const NvOdmSocPowerStateInfo* NvOdmQueryLowestSocPowerState(void)
 {
-    static NvOdmSocPowerStateInfo PowerStateInfo;
-    const static NvOdmSocPowerStateInfo* pPowerStateInfo = NULL;
 
+    static                      NvOdmSocPowerStateInfo  PowerStateInfo;
+    const static                NvOdmSocPowerStateInfo* pPowerStateInfo = NULL;
+    NvOdmServicesKeyListHandle  hKeyList;
+    NvU32                       LPStateSelection = 0;
     if (pPowerStateInfo == NULL)
     {
-        // Lowest power state.
-        PowerStateInfo.LowestPowerState = NvOdmSocPowerState_DeepSleep;
 
+        hKeyList = NvOdmServicesKeyListOpen();
+        if (hKeyList)
+        {
+            LPStateSelection = NvOdmServicesGetKeyValue(hKeyList,
+                                                NvOdmKeyListId_ReservedBctCustomerOption);
+            NvOdmServicesKeyListClose(hKeyList);
+            LPStateSelection = NV_DRF_VAL(TEGRA_DEVKIT, BCT_CUSTOPT, LPSTATE, LPStateSelection);
+        }
+        // Lowest power state controlled by the flashed custom option.
+        PowerStateInfo.LowestPowerState =  ((LPStateSelection == TEGRA_DEVKIT_BCT_CUSTOPT_0_LPSTATE_LP1)?
+                                            NvOdmSocPowerState_Suspend : NvOdmSocPowerState_DeepSleep);
         pPowerStateInfo = (const NvOdmSocPowerStateInfo*) &PowerStateInfo;
     }
-    
     return (pPowerStateInfo);
 }
 
diff --git a/arch/arm/mach-tegra/odm_kit/query/harmony/tegra_devkit_custopt.h b/arch/arm/mach-tegra/odm_kit/query/harmony/tegra_devkit_custopt.h
index 2d7990364fed..1ec701091145 100644
--- a/arch/arm/mach-tegra/odm_kit/query/harmony/tegra_devkit_custopt.h
+++ b/arch/arm/mach-tegra/odm_kit/query/harmony/tegra_devkit_custopt.h
@@ -136,12 +136,16 @@ extern "C"
 #define TEGRA_DEVKIT_BCT_CUSTOPT_0_DHCP_ENABLE          0x1UL
 
 /// Total RAM
-#define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_RANGE    31:28
+#define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_RANGE    30:28
 #define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_DEFAULT  0x0UL // 512 MB
 #define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_256      0x1UL // 256 MB
 #define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_512      0x2UL // 512 MB
 #define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_1024     0x3UL // 1024 MB (1 GB)
 
+/// Soc low power state
+#define TEGRA_DEVKIT_BCT_CUSTOPT_0_LPSTATE_RANGE            31:31
+#define TEGRA_DEVKIT_BCT_CUSTOPT_0_LPSTATE_LP0              0x0UL
+#define TEGRA_DEVKIT_BCT_CUSTOPT_0_LPSTATE_LP1              0x1UL
 #if defined(__cplusplus)
 }
 #endif
diff --git a/arch/arm/mach-tegra/odm_kit/query/whistler/nvodm_query.c b/arch/arm/mach-tegra/odm_kit/query/whistler/nvodm_query.c
index a66b46ae3323..2d522f9b0232 100755..100644
--- a/arch/arm/mach-tegra/odm_kit/query/whistler/nvodm_query.c
+++ b/arch/arm/mach-tegra/odm_kit/query/whistler/nvodm_query.c
@@ -1177,12 +1177,10 @@ const NvOdmSocPowerStateInfo* NvOdmQueryLowestSocPowerState(void)
 
     static                      NvOdmSocPowerStateInfo  PowerStateInfo;
     const static                NvOdmSocPowerStateInfo* pPowerStateInfo = NULL;
-
+    NvOdmServicesKeyListHandle  hKeyList;
+    NvU32                       LPStateSelection = 0;
     if (pPowerStateInfo == NULL)
     {
-#if 0
-        NvOdmServicesKeyListHandle  hKeyList;
-        NvU32                       LPStateSelection = 0;
         hKeyList = NvOdmServicesKeyListOpen();
         if (hKeyList)
         {
@@ -1191,17 +1189,11 @@ const NvOdmSocPowerStateInfo* NvOdmQueryLowestSocPowerState(void)
             NvOdmServicesKeyListClose(hKeyList);
             LPStateSelection = NV_DRF_VAL(TEGRA_DEVKIT, BCT_CUSTOPT, LPSTATE, LPStateSelection);
         }
-
         // Lowest power state controlled by the flashed custom option.
         PowerStateInfo.LowestPowerState =  ((LPStateSelection == TEGRA_DEVKIT_BCT_CUSTOPT_0_LPSTATE_LP1)?
                                             NvOdmSocPowerState_Suspend : NvOdmSocPowerState_DeepSleep);
-#endif
-        PowerStateInfo.LowestPowerState = NvOdmSocPowerState_Suspend;
-        // Idle threshold (Msecs) for the lowest power state.
-        //PowerStateInfo.IdleThreshold = 525;
         pPowerStateInfo = (const NvOdmSocPowerStateInfo*) &PowerStateInfo;
     }
-
     return (pPowerStateInfo);
 }
 
diff --git a/arch/arm/mach-tegra/odm_kit/query/whistler/tegra_devkit_custopt.h b/arch/arm/mach-tegra/odm_kit/query/whistler/tegra_devkit_custopt.h
index 8b6b7d6151fd..bfbedb35945f 100644
--- a/arch/arm/mach-tegra/odm_kit/query/whistler/tegra_devkit_custopt.h
+++ b/arch/arm/mach-tegra/odm_kit/query/whistler/tegra_devkit_custopt.h
@@ -159,7 +159,7 @@ extern "C"
 
 
 /// Total RAM
-#define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_RANGE    31:28
+#define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_RANGE    30:28
 #define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_DEFAULT  0x0UL
 #define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_1        0x1UL
 #define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_2        0x2UL
@@ -168,7 +168,10 @@ extern "C"
 #define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_5        0x5UL
 #define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_6        0x6UL
 #define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_7        0x7UL
-#define TEGRA_DEVKIT_BCT_SYSTEM_0_MEMORY_8        0x8UL
+/// Soc low power state
+#define TEGRA_DEVKIT_BCT_CUSTOPT_0_LPSTATE_RANGE            31:31
+#define TEGRA_DEVKIT_BCT_CUSTOPT_0_LPSTATE_LP0              0x0UL
+#define TEGRA_DEVKIT_BCT_CUSTOPT_0_LPSTATE_LP1              0x1UL
 
 #if defined(__cplusplus)
 }