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| author | Mayuresh Kulkarni <mkulkarni@nvidia.com> | 2011-09-15 14:56:10 +0530 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-10-13 12:47:20 -0700 |
| commit | fff41a7bcd9868f1c51fe5d53a1348ff28061771 (patch) | |
| tree | bdfd37160ecdbb1e566bd5d5656011f81d2430c8 | |
| parent | bf0f361174490782924b88fe72a23e6132ecfceb (diff) | |
arm: tegra: pm: issue a pl310 cache sync for tegra2
this needs to be done when the lp2 is aborted before the
stipulated programmed time to wake-up
for bug 867094
Change-Id: I02102ed8afa69d782de5950118352e80edc79df4
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-on: http://git-master/r/52581
Reviewed-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/sleep-t2.S | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/sleep-t2.S b/arch/arm/mach-tegra/sleep-t2.S index f0e58f0d4b03..f3bd0ca9450a 100644 --- a/arch/arm/mach-tegra/sleep-t2.S +++ b/arch/arm/mach-tegra/sleep-t2.S @@ -70,6 +70,7 @@ #define TEGRA_PMC_VIRT (TEGRA_PMC_BASE - IO_APB_PHYS + IO_APB_VIRT) #define TEGRA_ARM_PERIF_VIRT (TEGRA_ARM_PERIF_BASE - IO_CPU_PHYS + IO_CPU_VIRT) #define TEGRA_CLK_RESET_VIRT (TEGRA_CLK_RESET_BASE - IO_PPSB_PHYS + IO_PPSB_VIRT) +#define TEGRA_PL310_VIRT (TEGRA_ARM_PL310_BASE - IO_PPSB_PHYS + IO_PPSB_VIRT) #ifdef CONFIG_HOTPLUG_CPU /* @@ -258,6 +259,15 @@ ENTRY(tegra2_sleep_wfi) #endif #endif +#ifdef CONFIG_CACHE_L2X0 + /* Issue a PL310 cache sync operation */ + dsb + mov32 r2, TEGRA_PL310_VIRT + 0x730 @ cache sync + add r2, r2, r1 + mov r1, #0 + str r1, [r2] +#endif + pop_ctx_regs r0, r1 @ restore context registers mov pc, lr ENDPROC(tegra2_sleep_wfi) |