diff options
| author | Anshul Jain <anshulj@nvidia.com> | 2011-09-12 10:18:02 -0700 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-09-13 15:58:35 -0700 |
| commit | 113ef22869ce7928b0a1772bc3a9c33a67b498fc (patch) | |
| tree | eeb3ad5b9833116e40ee84dd2b49b4ffcf92b252 | |
| parent | 3c5a0b3d7bfbe30e1f312ae86d11eb8ee5bff7fa (diff) | |
arm: tegra: enable l2 cache data prefetch
Bug 874120
Change-Id: If058527adc3b0c5c903ed75ab1ffaeb08be37df2
Reviewed-on: http://git-master/r/51828
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Anshul Jain (SW) <anshulj@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/common.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index a5f373ec0284..1e911a3c80b8 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -194,7 +194,7 @@ void __init tegra_init_cache(void) #endif aux_ctrl = readl(p + L2X0_CACHE_TYPE); aux_ctrl = (aux_ctrl & 0x700) << (17-8); - aux_ctrl |= 0x6C000001; + aux_ctrl |= 0x7C000001; l2x0_init(p, aux_ctrl, 0x8200c3fe); #endif } |