diff options
| author | Pradeep Goudagunta <pgoudagunta@nvidia.com> | 2011-07-14 16:42:08 +0530 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-07-15 16:49:53 -0700 |
| commit | 8494a39c23c38945171b153546c6d7db05fb78b6 (patch) | |
| tree | fd5341d6669e202d5b68618af83c57411d994200 | |
| parent | 8538ff06beaf6a98f905f01f5697a819c0705ed2 (diff) | |
arm: tegra: cardhu: increasing UART3 drive strength
setting UART3 signal drive strength to maximum.
Bug 819411
Change-Id: Ie7103fe835868d8041d29bd2b85c7b43fcacc5eb
Reviewed-on: http://git-master/r/41028
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/board-cardhu-pinmux.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-cardhu-pinmux.c b/arch/arm/mach-tegra/board-cardhu-pinmux.c index 530ecfc838d6..b0b5726f206f 100644 --- a/arch/arm/mach-tegra/board-cardhu-pinmux.c +++ b/arch/arm/mach-tegra/board-cardhu-pinmux.c @@ -82,6 +82,9 @@ static __initdata struct tegra_drive_pingroup_config cardhu_drive_pinmux[] = { /* PWR_I2C */ SET_DRIVE(AO1, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), + + /* UART3 */ + SET_DRIVE(UART3, DISABLE, ENABLE, DIV_1, 31, 31, FASTEST, FASTEST), }; #define DEFAULT_PINMUX(_pingroup, _mux, _pupd, _tri, _io) \ |