diff options
| author | Xin Xie <xxie@nvidia.com> | 2011-10-14 12:37:36 -0700 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2011-10-26 15:53:38 -0700 |
| commit | 6feaad5a74a934f604f5d25220afff478c43736d (patch) | |
| tree | 78d436393caa83684928845bcf2575299c16a841 | |
| parent | 7c07da8873bf8a00efe4a15a7e8b140f24590143 (diff) | |
video: tegra: dsi: use mask to control interrupts
This patch is based on "video: tegra: dc: use mask to control
interrupts", so we do not use DC_CMD_INT_ENABLE to disable IRQ.
Bug 888207
Bug 870801
Change-Id: I2c6e38a22bac69631fdc74cd4e7813d015768fa3
Reviewed-on: http://git-master/r/58176
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
| -rw-r--r-- | drivers/video/tegra/dc/dsi.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/video/tegra/dc/dsi.c b/drivers/video/tegra/dc/dsi.c index 787607919433..1c10434b1485 100644 --- a/drivers/video/tegra/dc/dsi.c +++ b/drivers/video/tegra/dc/dsi.c @@ -850,10 +850,6 @@ void tegra_dsi_stop_dc_stream_at_frame_end(struct tegra_dc *dc, tegra_dsi_stop_dc_stream(dc, dsi); /* enable frame end interrupt */ - val = tegra_dc_readl(dc, DC_CMD_INT_ENABLE); - val |= FRAME_END_INT; - tegra_dc_writel(dc, val, DC_CMD_INT_ENABLE); - val = tegra_dc_readl(dc, DC_CMD_INT_MASK); val |= FRAME_END_INT; tegra_dc_writel(dc, val, DC_CMD_INT_MASK); @@ -864,9 +860,9 @@ void tegra_dsi_stop_dc_stream_at_frame_end(struct tegra_dc *dc, msecs_to_jiffies(frame_period)); /* disable frame end interrupt */ - val = tegra_dc_readl(dc, DC_CMD_INT_ENABLE); + val = tegra_dc_readl(dc, DC_CMD_INT_MASK); val &= ~FRAME_END_INT; - tegra_dc_writel(dc, val, DC_CMD_INT_ENABLE); + tegra_dc_writel(dc, val, DC_CMD_INT_MASK); } static void tegra_dsi_start_dc_stream(struct tegra_dc *dc, |