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authorCharlie Huang <chahuang@nvidia.com>2011-08-30 16:17:19 -0700
committerSimone Willett <swillett@nvidia.com>2011-10-27 15:03:37 -0700
commit15292d96c52c0692ec8666d52d355201142245a7 (patch)
tree23728be0c0ecedbf5809c603bde21036fdc1a9c0
parentc6b3f6e0eb0b6e3485d02fc5306a1c09cbacf914 (diff)
media: video: tegra: ar0832: Sunny P8M01E support
Add support of Sunny P8M01E module (AKA aptina 8141) This new module is identical with 8140 plus pixel improvement. Use different recommended register settings for each sensor. Add function to figure out the sensor id and let the odm driver pick up the right config data. Bug 868929 Change-Id: I5f0c4c2376d50305e2872e2b34c6078597971146 Reviewed-on: http://git-master/r/53022 Reviewed-by: Charlie Huang <chahuang@nvidia.com> Tested-by: Charlie Huang <chahuang@nvidia.com> Reviewed-by: Frank Chen <frankc@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
-rw-r--r--drivers/media/video/tegra/ar0832_main.c1470
-rw-r--r--include/media/ar0832_main.h5
2 files changed, 1106 insertions, 369 deletions
diff --git a/drivers/media/video/tegra/ar0832_main.c b/drivers/media/video/tegra/ar0832_main.c
index 3bb494c5ac17..97cb987e93d0 100644
--- a/drivers/media/video/tegra/ar0832_main.c
+++ b/drivers/media/video/tegra/ar0832_main.c
@@ -48,14 +48,15 @@ struct ar0832_dev {
struct mutex ar0832_camera_lock;
struct miscdevice misc_dev;
struct ar0832_power_rail power_rail;
+ struct mutex brd_power_lock;
+ int brd_power_cnt;
atomic_t in_use;
char dname[20];
int is_stereo;
+ int sensor_id_valid;
+ u16 sensor_id_data;
};
-/* stereo */
-static u16 DefaultImageWidth = 1200;
-static u16 DefaultImageHeight = 680;
#define UpperByte16to8(x) ((u8)((x & 0xFF00) >> 8))
#define LowerByte16to8(x) ((u8)(x & 0x00FF))
@@ -63,6 +64,7 @@ static u16 DefaultImageHeight = 680;
#define ar0832_TABLE_END 1
#define ar0832_MAX_RETRIES 3
+#define AR0832_SENSORID_REG 0x0002
#define AR0832_RESET_REG 0x301A
#define AR0832_ID_REG 0x31FC
@@ -85,12 +87,14 @@ static struct ar0832_reg mode_start[] = {
{ar0832_TABLE_END, 0x0000}
};
-static struct ar0832_reg mode_3264X2448[] = {
+static struct ar0832_reg mode_3264X2448_8140[] = {
+ /* mode start */
{0x301A, 0x0058}, /* RESET_REGISTER */
{0x301A, 0x0050}, /* RESET_REGISTER */
{0x0104, 0x0100}, /* GROUPED_PARAMETER_HOLD */
{0x3064, 0x7800}, /* RESERVED_MFR_3064 */
{0x31AE, 0x0202}, /* SERIAL_FORMAT */
+ /* MT9E013 Recommended Settings */
{0x31B0, 0x0083}, /* FRAME_PREAMBLE */
{0x31B2, 0x004D}, /* LINE_PREAMBLE */
{0x31B4, 0x0E77}, /* MIPI_TIMING_0 */
@@ -100,85 +104,215 @@ static struct ar0832_reg mode_3264X2448[] = {
{0x31BC, 0x2A0D}, /* MIPI_TIMING_4 */
{ar0832_TABLE_WAIT_MS, 0x0005},
{0x0112, 0x0A0A}, /* CCP_DATA_FORMAT */
-
- {0x3044, 0x0590}, /* RESERVED_MFR_3044 */
+ {0x3044, 0x0590},
+ {0x306E, 0xFC80},
+ {0x30B2, 0xC000},
+ {0x30D6, 0x0800},
+ {0x316C, 0xB42F},
+ {0x316E, 0x869A},
+ {0x3170, 0x210E},
+ {0x317A, 0x010E},
+ {0x31E0, 0x1FB9},
+ {0x31E6, 0x07FC},
+ {0x37C0, 0x0000},
+ {0x37C2, 0x0000},
+ {0x37C4, 0x0000},
+ {0x37C6, 0x0000},
+ {0x3E00, 0x0011},
+ {0x3E02, 0x8801},
+ {0x3E04, 0x2801},
+ {0x3E06, 0x8449},
+ {0x3E08, 0x6841},
+ {0x3E0A, 0x400C},
+ {0x3E0C, 0x1001},
+ {0x3E0E, 0x2603},
+ {0x3E10, 0x4B41},
+ {0x3E12, 0x4B24},
+ {0x3E14, 0xA3CF},
+ {0x3E16, 0x8802},
+ {0x3E18, 0x8401},
+ {0x3E1A, 0x8601},
+ {0x3E1C, 0x8401},
+ {0x3E1E, 0x840A},
+ {0x3E20, 0xFF00},
+ {0x3E22, 0x8401},
+ {0x3E24, 0x00FF},
+ {0x3E26, 0x0088},
+ {0x3E28, 0x2E8A},
+ {0x3E30, 0x0000},
+ {0x3E32, 0x8801},
+ {0x3E34, 0x4029},
+ {0x3E36, 0x00FF},
+ {0x3E38, 0x8469},
+ {0x3E3A, 0x00FF},
+ {0x3E3C, 0x2801},
+ {0x3E3E, 0x3E2A},
+ {0x3E40, 0x1C01},
+ {0x3E42, 0xFF84},
+ {0x3E44, 0x8401},
+ {0x3E46, 0x0C01},
+ {0x3E48, 0x8401},
+ {0x3E4A, 0x00FF},
+ {0x3E4C, 0x8402},
+ {0x3E4E, 0x8984},
+ {0x3E50, 0x6628},
+ {0x3E52, 0x8340},
+ {0x3E54, 0x00FF},
+ {0x3E56, 0x4A42},
+ {0x3E58, 0x2703},
+ {0x3E5A, 0x6752},
+ {0x3E5C, 0x3F2A},
+ {0x3E5E, 0x846A},
+ {0x3E60, 0x4C01},
+ {0x3E62, 0x8401},
+ {0x3E66, 0x3901},
+ {0x3E90, 0x2C01},
+ {0x3E98, 0x2B02},
+ {0x3E92, 0x2A04},
+ {0x3E94, 0x2509},
+ {0x3E96, 0x0000},
+ {0x3E9A, 0x2905},
+ {0x3E9C, 0x00FF},
+ {0x3ECC, 0x00EB},
+ {0x3ED0, 0x1E24},
+ {0x3ED4, 0xAFC4},
+ {0x3ED6, 0x909B},
+ {0x3EE0, 0x2424},
+ {0x3EE2, 0x9797},
+ {0x3EE4, 0xC100},
+ {0x3EE6, 0x0540},
+ {0x3174, 0x8000},
+
+ /* mode end */
+ {0x0300, 0x0004}, /* VT_PIX_CLK_DIV */
+ {0x0302, 0x0001}, /* VT_SYS_CLK_DIV */
+ {0x0304, 0x0002}, /* PRE_PLL_CLK_DIV */
+ {0x0306, 0x0040}, /* PLL_MULTIPLIER */
+ {0x0308, 0x000A}, /* OP_PIX_CLK_DIV */
+ {0x030A, 0x0001}, /* OP_SYS_CLK_DIV */
+ {ar0832_TABLE_WAIT_MS, 0x0001},
+ {0x3064, 0x7400}, /* RESERVED_MFR_3064 */
+ {0x0104, 0x0100}, /* GROUPED_PARAMETER_HOLD */
+ {0x0344, 0x0004}, /* X_ADDR_START */
+ {0x0348, 0x0CCB}, /* X_ADDR_END */
+ {0x0346, 0x0004}, /* Y_ADDR_START */
+ {0x034A, 0x099B}, /* Y_ADDR_END */
+ {0x034C, 0x0CC8}, /* X_OUTPUT_SIZE */
+ {0x034E, 0x0998}, /* Y_OUTPUT_SIZE */
+ {0x3040, 0xC041}, /* READ_MODE */
{0x306E, 0xFC80}, /* DATAPATH_SELECT */
- {0x30B2, 0xC000}, /* RESERVED_MFR_30B2 */
- {0x30D6, 0x0800}, /* RESERVED_MFR_30D6 */
- {0x316C, 0xB42F}, /* RESERVED_MFR_316C */
- {0x316E, 0x869A}, /* RESERVED_MFR_316E */
- {0x3170, 0x210E}, /* RESERVED_MFR_3170 */
- {0x317A, 0x010E}, /* RESERVED_MFR_317A */
- {0x31E0, 0x1FB9}, /* RESERVED_MFR_31E0 */
- {0x31E6, 0x07FC}, /* RESERVED_MFR_31E6 */
- {0x37C0, 0x0000}, /* P_GR_Q5 */
- {0x37C2, 0x0000}, /* P_RD_Q5 */
- {0x37C4, 0x0000}, /* P_BL_Q5 */
- {0x37C6, 0x0000}, /* P_GB_Q5 */
- {0x3E00, 0x0011}, /* RESERVED_MFR_3E00 */
- {0x3E02, 0x8801}, /* RESERVED_MFR_3E02 */
- {0x3E04, 0x2801}, /* RESERVED_MFR_3E04 */
- {0x3E06, 0x8449}, /* RESERVED_MFR_3E06 */
- {0x3E08, 0x6841}, /* RESERVED_MFR_3E08 */
- {0x3E0A, 0x400C}, /* RESERVED_MFR_3E0A */
- {0x3E0C, 0x1001}, /* RESERVED_MFR_3E0C */
- {0x3E0E, 0x2603}, /* RESERVED_MFR_3E0E */
- {0x3E10, 0x4B41}, /* RESERVED_MFR_3E10 */
- {0x3E12, 0x4B24}, /* RESERVED_MFR_3E12 */
- {0x3E14, 0xA3CF}, /* RESERVED_MFR_3E14 */
- {0x3E16, 0x8802}, /* RESERVED_MFR_3E16 */
- {0x3E18, 0x84FF}, /* RESERVED_MFR_3E18 */
- {0x3E1A, 0x8601}, /* RESERVED_MFR_3E1A */
- {0x3E1C, 0x8401}, /* RESERVED_MFR_3E1C */
- {0x3E1E, 0x840A}, /* RESERVED_MFR_3E1E */
- {0x3E20, 0xFF00}, /* RESERVED_MFR_3E20 */
- {0x3E22, 0x8401}, /* RESERVED_MFR_3E22 */
- {0x3E24, 0x00FF}, /* RESERVED_MFR_3E24 */
- {0x3E26, 0x0088}, /* RESERVED_MFR_3E26 */
- {0x3E28, 0x2E8A}, /* RESERVED_MFR_3E28 */
- {0x3E30, 0x0000}, /* RESERVED_MFR_3E30 */
- {0x3E32, 0x8801}, /* RESERVED_MFR_3E32 */
- {0x3E34, 0x4029}, /* RESERVED_MFR_3E34 */
- {0x3E36, 0x00FF}, /* RESERVED_MFR_3E36 */
- {0x3E38, 0x8469}, /* RESERVED_MFR_3E38 */
- {0x3E3A, 0x00FF}, /* RESERVED_MFR_3E3A */
- {0x3E3C, 0x2801}, /* RESERVED_MFR_3E3C */
- {0x3E3E, 0x3E2A}, /* RESERVED_MFR_3E3E */
- {0x3E40, 0x1C01}, /* RESERVED_MFR_3E40 */
- {0x3E42, 0xFF84}, /* RESERVED_MFR_3E42 */
- {0x3E44, 0x8401}, /* RESERVED_MFR_3E44 */
- {0x3E46, 0x0C01}, /* RESERVED_MFR_3E46 */
- {0x3E48, 0x8401}, /* RESERVED_MFR_3E48 */
- {0x3E4A, 0x00FF}, /* RESERVED_MFR_3E4A */
- {0x3E4C, 0x8402}, /* RESERVED_MFR_3E4C */
- {0x3E4E, 0x8984}, /* RESERVED_MFR_3E4E */
- {0x3E50, 0x6628}, /* RESERVED_MFR_3E50 */
- {0x3E52, 0x8340}, /* RESERVED_MFR_3E52 */
- {0x3E54, 0x00FF}, /* RESERVED_MFR_3E54 */
- {0x3E56, 0x4A42}, /* RESERVED_MFR_3E56 */
- {0x3E58, 0x2703}, /* RESERVED_MFR_3E58 */
- {0x3E5A, 0x6752}, /* RESERVED_MFR_3E5A */
- {0x3E5C, 0x3F2A}, /* RESERVED_MFR_3E5C */
- {0x3E5E, 0x846A}, /* RESERVED_MFR_3E5E */
- {0x3E60, 0x4C01}, /* RESERVED_MFR_3E60 */
- {0x3E62, 0x8401}, /* RESERVED_MFR_3E62 */
- {0x3E66, 0x3901}, /* RESERVED_MFR_3E66 */
- {0x3E90, 0x2C01}, /* RESERVED_MFR_3E90 */
- {0x3E98, 0x2B02}, /* RESERVED_MFR_3E98 */
- {0x3E92, 0x2A04}, /* RESERVED_MFR_3E92 */
- {0x3E94, 0x2509}, /* RESERVED_MFR_3E94 */
- {0x3E96, 0x0000}, /* RESERVED_MFR_3E96 */
- {0x3E9A, 0x2905}, /* RESERVED_MFR_3E9A */
- {0x3E9C, 0x00FF}, /* RESERVED_MFR_3E9C */
- {0x3ECC, 0x00EB}, /* RESERVED_MFR_3ECC */
+ {0x0400, 0x0000}, /* SCALING_MODE */
+ {0x0404, 0x0010}, /* SCALE_M */
+ {0x3178, 0x0000}, /* RESERVED_MFR_3178 */
{0x3ED0, 0x1E24}, /* RESERVED_MFR_3ED0 */
- {0x3ED4, 0xAFC4}, /* RESERVED_MFR_3ED4 */
- {0x3ED6, 0x909B}, /* RESERVED_MFR_3ED6 */
- {0x3EE0, 0x2424}, /* RESERVED_MFR_3EE0 */
- {0x3EE2, 0x9797}, /* RESERVED_MFR_3EE2 */
- {0x3EE4, 0xC100}, /* RESERVED_MFR_3EE4 */
- {0x3EE6, 0x0540}, /* RESERVED_MFR_3EE6 */
- {0x3174, 0x8000}, /* RESERVED_MFR_3174 */
+ {0x0400, 0x0000}, /* SCALING_MODE */
+ {0x0404, 0x0010}, /* SCALE_M */
+ {0x0342, 0x133C}, /* LINE_LENGTH_PCK */
+ {0x0340, 0x0A27}, /* FRAME_LENGTH_LINES */
+ {0x0202, 0x0A27}, /* COARSE_INTEGRATION_TIME */
+ {0x3014, 0x09DC}, /* FINE_INTEGRATION_TIME */
+ {0x3010, 0x0078}, /* FINE_CORRECTION */
+ {0x301A, 0x8250}, /* RESET_REGISTER */
+ {0x301A, 0x8650}, /* RESET_REGISTER */
+ {0x301A, 0x8658}, /* RESET_REGISTER */
+ /* gain */
+ {0x3056, 0x10AA}, /* gain */
+ {0x3058, 0x10AA}, /* gain */
+ {0x305a, 0x10AA}, /* gain */
+ {0x305c, 0x10AA}, /* gain */
+ {0x0104, 0x0000}, /* GROUPED_PARAMETER_HOLD */
+ {0x301A, 0x065C}, /* RESET_REGISTER */
+ {ar0832_TABLE_END, 0x0000}
+};
+
+static struct ar0832_reg mode_3264X2448_8141[] = {
+ /* mode start */
+ {0x301A, 0x0058}, /* RESET_REGISTER */
+ {0x301A, 0x0050}, /* RESET_REGISTER */
+ {0x0104, 0x0100}, /* GROUPED_PARAMETER_HOLD */
+ {0x3064, 0x7800}, /* RESERVED_MFR_3064 */
+ {0x31AE, 0x0202}, /* SERIAL_FORMAT */
+ /* AR0832 Recommended Settings */
+ {0x3044, 0x0590},
+ {0x306E, 0xFC80},
+ {0x30B2, 0xC000},
+ {0x30D6, 0x0800},
+ {0x316C, 0xB42F},
+ {0x316E, 0x869A},
+ {0x3170, 0x210E},
+ {0x317A, 0x010E},
+ {0x31E0, 0x1FB9},
+ {0x31E6, 0x07FC},
+ {0x37C0, 0x0000},
+ {0x37C2, 0x0000},
+ {0x37C4, 0x0000},
+ {0x37C6, 0x0000},
+ {0x3E00, 0x0011},
+ {0x3E02, 0x8801},
+ {0x3E04, 0x2801},
+ {0x3E06, 0x8449},
+ {0x3E08, 0x6841},
+ {0x3E0A, 0x400C},
+ {0x3E0C, 0x1001},
+ {0x3E0E, 0x2603},
+ {0x3E10, 0x4B41},
+ {0x3E12, 0x4B24},
+ {0x3E14, 0xA3CF},
+ {0x3E16, 0x8802},
+ {0x3E18, 0x8401},
+ {0x3E1A, 0x8601},
+ {0x3E1C, 0x8401},
+ {0x3E1E, 0x840A},
+ {0x3E20, 0xFF00},
+ {0x3E22, 0x8401},
+ {0x3E24, 0x00FF},
+ {0x3E26, 0x0088},
+ {0x3E28, 0x2E8A},
+ {0x3E30, 0x0000},
+ {0x3E32, 0x8801},
+ {0x3E34, 0x4029},
+ {0x3E36, 0x00FF},
+ {0x3E38, 0x8469},
+ {0x3E3A, 0x00FF},
+ {0x3E3C, 0x2801},
+ {0x3E3E, 0x3E2A},
+ {0x3E40, 0x1C01},
+ {0x3E42, 0xFF84},
+ {0x3E44, 0x8401},
+ {0x3E46, 0x0C01},
+ {0x3E48, 0x8401},
+ {0x3E4A, 0x00FF},
+ {0x3E4C, 0x8402},
+ {0x3E4E, 0x8984},
+ {0x3E50, 0x6628},
+ {0x3E52, 0x8340},
+ {0x3E54, 0x00FF},
+ {0x3E56, 0x4A42},
+ {0x3E58, 0x2703},
+ {0x3E5A, 0x6752},
+ {0x3E5C, 0x3F2A},
+ {0x3E5E, 0x846A},
+ {0x3E60, 0x4C01},
+ {0x3E62, 0x8401},
+ {0x3E66, 0x3901},
+ {0x3E90, 0x2C01},
+ {0x3E98, 0x2B02},
+ {0x3E92, 0x2A04},
+ {0x3E94, 0x2509},
+ {0x3E96, 0x0000},
+ {0x3E9A, 0x2905},
+ {0x3E9C, 0x00FF},
+ {0x3ECC, 0x00EB},
+ {0x3ED0, 0x1E24},
+ {0x3ED4, 0xAFC4},
+ {0x3ED6, 0x909B},
+ {0x3EE0, 0x2424},
+ {0x3EE2, 0x9797},
+ {0x3EE4, 0xC100},
+ {0x3EE6, 0x0540},
+ {0x3174, 0x8000},
+
+ /* mode end */
{0x0300, 0x0004}, /* VT_PIX_CLK_DIV */
{0x0302, 0x0001}, /* VT_SYS_CLK_DIV */
{0x0304, 0x0002}, /* PRE_PLL_CLK_DIV */
@@ -220,12 +354,14 @@ static struct ar0832_reg mode_3264X2448[] = {
{ar0832_TABLE_END, 0x0000}
};
-static struct ar0832_reg mode_2880X1620[] = {
+static struct ar0832_reg mode_2880X1620_8140[] = {
+ /* mode start */
{0x301A, 0x0058}, /* RESET_REGISTER */
{0x301A, 0x0050}, /* RESET_REGISTER */
{0x0104, 0x0100}, /* GROUPED_PARAMETER_HOLD */
{0x3064, 0x7800}, /* RESERVED_MFR_3064 */
{0x31AE, 0x0202}, /* SERIAL_FORMAT */
+ /* MT9E013 Recommended Settings */
{0x31B0, 0x0083}, /* FRAME_PREAMBLE */
{0x31B2, 0x004D}, /* LINE_PREAMBLE */
{0x31B4, 0x0E77}, /* MIPI_TIMING_0 */
@@ -235,85 +371,214 @@ static struct ar0832_reg mode_2880X1620[] = {
{0x31BC, 0x2A0D}, /* MIPI_TIMING_4 */
{ar0832_TABLE_WAIT_MS, 0x0005},
{0x0112, 0x0A0A}, /* CCP_DATA_FORMAT */
-
- {0x3044, 0x0590}, /* RESERVED_MFR_3044 */
+ {0x3044, 0x0590},
+ {0x306E, 0xFC80},
+ {0x30B2, 0xC000},
+ {0x30D6, 0x0800},
+ {0x316C, 0xB42F},
+ {0x316E, 0x869A},
+ {0x3170, 0x210E},
+ {0x317A, 0x010E},
+ {0x31E0, 0x1FB9},
+ {0x31E6, 0x07FC},
+ {0x37C0, 0x0000},
+ {0x37C2, 0x0000},
+ {0x37C4, 0x0000},
+ {0x37C6, 0x0000},
+ {0x3E00, 0x0011},
+ {0x3E02, 0x8801},
+ {0x3E04, 0x2801},
+ {0x3E06, 0x8449},
+ {0x3E08, 0x6841},
+ {0x3E0A, 0x400C},
+ {0x3E0C, 0x1001},
+ {0x3E0E, 0x2603},
+ {0x3E10, 0x4B41},
+ {0x3E12, 0x4B24},
+ {0x3E14, 0xA3CF},
+ {0x3E16, 0x8802},
+ {0x3E18, 0x8401},
+ {0x3E1A, 0x8601},
+ {0x3E1C, 0x8401},
+ {0x3E1E, 0x840A},
+ {0x3E20, 0xFF00},
+ {0x3E22, 0x8401},
+ {0x3E24, 0x00FF},
+ {0x3E26, 0x0088},
+ {0x3E28, 0x2E8A},
+ {0x3E30, 0x0000},
+ {0x3E32, 0x8801},
+ {0x3E34, 0x4029},
+ {0x3E36, 0x00FF},
+ {0x3E38, 0x8469},
+ {0x3E3A, 0x00FF},
+ {0x3E3C, 0x2801},
+ {0x3E3E, 0x3E2A},
+ {0x3E40, 0x1C01},
+ {0x3E42, 0xFF84},
+ {0x3E44, 0x8401},
+ {0x3E46, 0x0C01},
+ {0x3E48, 0x8401},
+ {0x3E4A, 0x00FF},
+ {0x3E4C, 0x8402},
+ {0x3E4E, 0x8984},
+ {0x3E50, 0x6628},
+ {0x3E52, 0x8340},
+ {0x3E54, 0x00FF},
+ {0x3E56, 0x4A42},
+ {0x3E58, 0x2703},
+ {0x3E5A, 0x6752},
+ {0x3E5C, 0x3F2A},
+ {0x3E5E, 0x846A},
+ {0x3E60, 0x4C01},
+ {0x3E62, 0x8401},
+ {0x3E66, 0x3901},
+ {0x3E90, 0x2C01},
+ {0x3E98, 0x2B02},
+ {0x3E92, 0x2A04},
+ {0x3E94, 0x2509},
+ {0x3E96, 0x0000},
+ {0x3E9A, 0x2905},
+ {0x3E9C, 0x00FF},
+ {0x3ECC, 0x00EB},
+ {0x3ED0, 0x1E24},
+ {0x3ED4, 0xAFC4},
+ {0x3ED6, 0x909B},
+ {0x3EE0, 0x2424},
+ {0x3EE2, 0x9797},
+ {0x3EE4, 0xC100},
+ {0x3EE6, 0x0540},
+ {0x3174, 0x8000},
+
+ /* mode end */
+ {0x0300, 0x0004}, /* VT_PIX_CLK_DIV */
+ {0x0302, 0x0001}, /* VT_SYS_CLK_DIV */
+ {0x0304, 0x0002}, /* PRE_PLL_CLK_DIV */
+ {0x0306, 0x0040}, /* PLL_MULTIPLIER */
+ {0x0308, 0x000A}, /* OP_PIX_CLK_DIV */
+ {0x030A, 0x0001}, /* OP_SYS_CLK_DIV */
+ {ar0832_TABLE_WAIT_MS, 0x0001},
+ {0x3064, 0x7400}, /* RESERVED_MFR_3064 */
+ {0x0104, 0x0100}, /* GROUPED_PARAMETER_HOLD */
+ {0x0344, 0x00C8}, /* X_ADDR_START */
+ {0x0348, 0x0C07}, /* X_ADDR_END */
+ {0x0346, 0x01A6}, /* Y_ADDR_START */
+ {0x034A, 0x07F9}, /* Y_ADDR_END */
+ {0x034C, 0x0B40}, /* X_OUTPUT_SIZE */
+ {0x034E, 0x0654}, /* Y_OUTPUT_SIZE */
+ {0x3040, 0xC041}, /* READ_MODE */
{0x306E, 0xFC80}, /* DATAPATH_SELECT */
- {0x30B2, 0xC000}, /* RESERVED_MFR_30B2 */
- {0x30D6, 0x0800}, /* RESERVED_MFR_30D6 */
- {0x316C, 0xB42F}, /* RESERVED_MFR_316C */
- {0x316E, 0x869A}, /* RESERVED_MFR_316E */
- {0x3170, 0x210E}, /* RESERVED_MFR_3170 */
- {0x317A, 0x010E}, /* RESERVED_MFR_317A */
- {0x31E0, 0x1FB9}, /* RESERVED_MFR_31E0 */
- {0x31E6, 0x07FC}, /* RESERVED_MFR_31E6 */
- {0x37C0, 0x0000}, /* P_GR_Q5 */
- {0x37C2, 0x0000}, /* P_RD_Q5 */
- {0x37C4, 0x0000}, /* P_BL_Q5 */
- {0x37C6, 0x0000}, /* P_GB_Q5 */
- {0x3E00, 0x0011}, /* RESERVED_MFR_3E00 */
- {0x3E02, 0x8801}, /* RESERVED_MFR_3E02 */
- {0x3E04, 0x2801}, /* RESERVED_MFR_3E04 */
- {0x3E06, 0x8449}, /* RESERVED_MFR_3E06 */
- {0x3E08, 0x6841}, /* RESERVED_MFR_3E08 */
- {0x3E0A, 0x400C}, /* RESERVED_MFR_3E0A */
- {0x3E0C, 0x1001}, /* RESERVED_MFR_3E0C */
- {0x3E0E, 0x2603}, /* RESERVED_MFR_3E0E */
- {0x3E10, 0x4B41}, /* RESERVED_MFR_3E10 */
- {0x3E12, 0x4B24}, /* RESERVED_MFR_3E12 */
- {0x3E14, 0xA3CF}, /* RESERVED_MFR_3E14 */
- {0x3E16, 0x8802}, /* RESERVED_MFR_3E16 */
- {0x3E18, 0x84FF}, /* RESERVED_MFR_3E18 */
- {0x3E1A, 0x8601}, /* RESERVED_MFR_3E1A */
- {0x3E1C, 0x8401}, /* RESERVED_MFR_3E1C */
- {0x3E1E, 0x840A}, /* RESERVED_MFR_3E1E */
- {0x3E20, 0xFF00}, /* RESERVED_MFR_3E20 */
- {0x3E22, 0x8401}, /* RESERVED_MFR_3E22 */
- {0x3E24, 0x00FF}, /* RESERVED_MFR_3E24 */
- {0x3E26, 0x0088}, /* RESERVED_MFR_3E26 */
- {0x3E28, 0x2E8A}, /* RESERVED_MFR_3E28 */
- {0x3E30, 0x0000}, /* RESERVED_MFR_3E30 */
- {0x3E32, 0x8801}, /* RESERVED_MFR_3E32 */
- {0x3E34, 0x4029}, /* RESERVED_MFR_3E34 */
- {0x3E36, 0x00FF}, /* RESERVED_MFR_3E36 */
- {0x3E38, 0x8469}, /* RESERVED_MFR_3E38 */
- {0x3E3A, 0x00FF}, /* RESERVED_MFR_3E3A */
- {0x3E3C, 0x2801}, /* RESERVED_MFR_3E3C */
- {0x3E3E, 0x3E2A}, /* RESERVED_MFR_3E3E */
- {0x3E40, 0x1C01}, /* RESERVED_MFR_3E40 */
- {0x3E42, 0xFF84}, /* RESERVED_MFR_3E42 */
- {0x3E44, 0x8401}, /* RESERVED_MFR_3E44 */
- {0x3E46, 0x0C01}, /* RESERVED_MFR_3E46 */
- {0x3E48, 0x8401}, /* RESERVED_MFR_3E48 */
- {0x3E4A, 0x00FF}, /* RESERVED_MFR_3E4A */
- {0x3E4C, 0x8402}, /* RESERVED_MFR_3E4C */
- {0x3E4E, 0x8984}, /* RESERVED_MFR_3E4E */
- {0x3E50, 0x6628}, /* RESERVED_MFR_3E50 */
- {0x3E52, 0x8340}, /* RESERVED_MFR_3E52 */
- {0x3E54, 0x00FF}, /* RESERVED_MFR_3E54 */
- {0x3E56, 0x4A42}, /* RESERVED_MFR_3E56 */
- {0x3E58, 0x2703}, /* RESERVED_MFR_3E58 */
- {0x3E5A, 0x6752}, /* RESERVED_MFR_3E5A */
- {0x3E5C, 0x3F2A}, /* RESERVED_MFR_3E5C */
- {0x3E5E, 0x846A}, /* RESERVED_MFR_3E5E */
- {0x3E60, 0x4C01}, /* RESERVED_MFR_3E60 */
- {0x3E62, 0x8401}, /* RESERVED_MFR_3E62 */
- {0x3E66, 0x3901}, /* RESERVED_MFR_3E66 */
- {0x3E90, 0x2C01}, /* RESERVED_MFR_3E90 */
- {0x3E98, 0x2B02}, /* RESERVED_MFR_3E98 */
- {0x3E92, 0x2A04}, /* RESERVED_MFR_3E92 */
- {0x3E94, 0x2509}, /* RESERVED_MFR_3E94 */
- {0x3E96, 0x0000}, /* RESERVED_MFR_3E96 */
- {0x3E9A, 0x2905}, /* RESERVED_MFR_3E9A */
- {0x3E9C, 0x00FF}, /* RESERVED_MFR_3E9C */
- {0x3ECC, 0x00EB}, /* RESERVED_MFR_3ECC */
+ {0x0400, 0x0000}, /* SCALING_MODE */
+ {0x0404, 0x0010}, /* SCALE_M */
+ {0x3178, 0x0000}, /* RESERVED_MFR_3178 */
{0x3ED0, 0x1E24}, /* RESERVED_MFR_3ED0 */
- {0x3ED4, 0xAFC4}, /* RESERVED_MFR_3ED4 */
- {0x3ED6, 0x909B}, /* RESERVED_MFR_3ED6 */
- {0x3EE0, 0x2424}, /* RESERVED_MFR_3EE0 */
- {0x3EE2, 0x9797}, /* RESERVED_MFR_3EE2 */
- {0x3EE4, 0xC100}, /* RESERVED_MFR_3EE4 */
- {0x3EE6, 0x0540}, /* RESERVED_MFR_3EE6 */
- {0x3174, 0x8000}, /* RESERVED_MFR_3174 */
+
+ {0x0342, 0x11B8}, /* LINE_LENGTH_PCK */
+ {0x0340, 0x06E3}, /* FRAME_LENGTH_LINES */
+ {0x0202, 0x06E3}, /* COARSE_INTEGRATION_TIME */
+ {0x3014, 0x0BD8}, /* FINE_INTEGRATION_TIME */
+ {0x3010, 0x0078}, /* FINE_CORRECTION */
+ {0x301A, 0x8250}, /* RESET_REGISTER */
+ {0x301A, 0x8650}, /* RESET_REGISTER */
+ {0x301A, 0x8658}, /* RESET_REGISTER */
+ /* gain */
+ {0x3056, 0x10AA}, /* gain */
+ {0x3058, 0x10AA}, /* gain */
+ {0x305a, 0x10AA}, /* gain */
+ {0x305c, 0x10AA}, /* gain */
+ {0x0104, 0x0000}, /* GROUPED_PARAMETER_HOLD */
+ {0x301A, 0x065C}, /* RESET_REGISTER */
+ {ar0832_TABLE_END, 0x0000}
+};
+
+static struct ar0832_reg mode_2880X1620_8141[] = {
+ /* mode start */
+ {0x301A, 0x0058}, /* RESET_REGISTER */
+ {0x301A, 0x0050}, /* RESET_REGISTER */
+ {0x0104, 0x0100}, /* GROUPED_PARAMETER_HOLD */
+ {0x3064, 0x7800}, /* RESERVED_MFR_3064 */
+ {0x31AE, 0x0202}, /* SERIAL_FORMAT */
+ /* AR0832 Recommended Settings */
+ {0x3044, 0x0590},
+ {0x306E, 0xFC80},
+ {0x30B2, 0xC000},
+ {0x30D6, 0x0800},
+ {0x316C, 0xB42F},
+ {0x316E, 0x869A},
+ {0x3170, 0x210E},
+ {0x317A, 0x010E},
+ {0x31E0, 0x1FB9},
+ {0x31E6, 0x07FC},
+ {0x37C0, 0x0000},
+ {0x37C2, 0x0000},
+ {0x37C4, 0x0000},
+ {0x37C6, 0x0000},
+ {0x3E00, 0x0011},
+ {0x3E02, 0x8801},
+ {0x3E04, 0x2801},
+ {0x3E06, 0x8449},
+ {0x3E08, 0x6841},
+ {0x3E0A, 0x400C},
+ {0x3E0C, 0x1001},
+ {0x3E0E, 0x2603},
+ {0x3E10, 0x4B41},
+ {0x3E12, 0x4B24},
+ {0x3E14, 0xA3CF},
+ {0x3E16, 0x8802},
+ {0x3E18, 0x8401},
+ {0x3E1A, 0x8601},
+ {0x3E1C, 0x8401},
+ {0x3E1E, 0x840A},
+ {0x3E20, 0xFF00},
+ {0x3E22, 0x8401},
+ {0x3E24, 0x00FF},
+ {0x3E26, 0x0088},
+ {0x3E28, 0x2E8A},
+ {0x3E30, 0x0000},
+ {0x3E32, 0x8801},
+ {0x3E34, 0x4029},
+ {0x3E36, 0x00FF},
+ {0x3E38, 0x8469},
+ {0x3E3A, 0x00FF},
+ {0x3E3C, 0x2801},
+ {0x3E3E, 0x3E2A},
+ {0x3E40, 0x1C01},
+ {0x3E42, 0xFF84},
+ {0x3E44, 0x8401},
+ {0x3E46, 0x0C01},
+ {0x3E48, 0x8401},
+ {0x3E4A, 0x00FF},
+ {0x3E4C, 0x8402},
+ {0x3E4E, 0x8984},
+ {0x3E50, 0x6628},
+ {0x3E52, 0x8340},
+ {0x3E54, 0x00FF},
+ {0x3E56, 0x4A42},
+ {0x3E58, 0x2703},
+ {0x3E5A, 0x6752},
+ {0x3E5C, 0x3F2A},
+ {0x3E5E, 0x846A},
+ {0x3E60, 0x4C01},
+ {0x3E62, 0x8401},
+ {0x3E66, 0x3901},
+ {0x3E90, 0x2C01},
+ {0x3E98, 0x2B02},
+ {0x3E92, 0x2A04},
+ {0x3E94, 0x2509},
+ {0x3E96, 0x0000},
+ {0x3E9A, 0x2905},
+ {0x3E9C, 0x00FF},
+ {0x3ECC, 0x00EB},
+ {0x3ED0, 0x1E24},
+ {0x3ED4, 0xAFC4},
+ {0x3ED6, 0x909B},
+ {0x3EE0, 0x2424},
+ {0x3EE2, 0x9797},
+ {0x3EE4, 0xC100},
+ {0x3EE6, 0x0540},
+ {0x3174, 0x8000},
+
+ /* mode end */
{0x0300, 0x0004}, /* VT_PIX_CLK_DIV */
{0x0302, 0x0001}, /* VT_SYS_CLK_DIV */
{0x0304, 0x0002}, /* PRE_PLL_CLK_DIV */
@@ -354,12 +619,14 @@ static struct ar0832_reg mode_2880X1620[] = {
{ar0832_TABLE_END, 0x0000}
};
-static struct ar0832_reg mode_1920X1080[] = {
+static struct ar0832_reg mode_1920X1080_8140[] = {
+ /* mode start */
{0x301A, 0x0058}, /* RESET_REGISTER */
{0x301A, 0x0050}, /* RESET_REGISTER */
{0x0104, 0x0100}, /* GROUPED_PARAMETER_HOLD */
{0x3064, 0x7800}, /* RESERVED_MFR_3064 */
{0x31AE, 0x0202}, /* SERIAL_FORMAT */
+ /* MT9E013 Recommended Settings */
{0x31B0, 0x0083}, /* FRAME_PREAMBLE */
{0x31B2, 0x004D}, /* LINE_PREAMBLE */
{0x31B4, 0x0E77}, /* MIPI_TIMING_0 */
@@ -369,84 +636,214 @@ static struct ar0832_reg mode_1920X1080[] = {
{0x31BC, 0x2A0D}, /* MIPI_TIMING_4 */
{ar0832_TABLE_WAIT_MS, 0x0005},
{0x0112, 0x0A0A}, /* CCP_DATA_FORMAT */
- {0x3044, 0x0590}, /* RESERVED_MFR_3044 */
+ {0x3044, 0x0590},
+ {0x306E, 0xFC80},
+ {0x30B2, 0xC000},
+ {0x30D6, 0x0800},
+ {0x316C, 0xB42F},
+ {0x316E, 0x869A},
+ {0x3170, 0x210E},
+ {0x317A, 0x010E},
+ {0x31E0, 0x1FB9},
+ {0x31E6, 0x07FC},
+ {0x37C0, 0x0000},
+ {0x37C2, 0x0000},
+ {0x37C4, 0x0000},
+ {0x37C6, 0x0000},
+ {0x3E00, 0x0011},
+ {0x3E02, 0x8801},
+ {0x3E04, 0x2801},
+ {0x3E06, 0x8449},
+ {0x3E08, 0x6841},
+ {0x3E0A, 0x400C},
+ {0x3E0C, 0x1001},
+ {0x3E0E, 0x2603},
+ {0x3E10, 0x4B41},
+ {0x3E12, 0x4B24},
+ {0x3E14, 0xA3CF},
+ {0x3E16, 0x8802},
+ {0x3E18, 0x8401},
+ {0x3E1A, 0x8601},
+ {0x3E1C, 0x8401},
+ {0x3E1E, 0x840A},
+ {0x3E20, 0xFF00},
+ {0x3E22, 0x8401},
+ {0x3E24, 0x00FF},
+ {0x3E26, 0x0088},
+ {0x3E28, 0x2E8A},
+ {0x3E30, 0x0000},
+ {0x3E32, 0x8801},
+ {0x3E34, 0x4029},
+ {0x3E36, 0x00FF},
+ {0x3E38, 0x8469},
+ {0x3E3A, 0x00FF},
+ {0x3E3C, 0x2801},
+ {0x3E3E, 0x3E2A},
+ {0x3E40, 0x1C01},
+ {0x3E42, 0xFF84},
+ {0x3E44, 0x8401},
+ {0x3E46, 0x0C01},
+ {0x3E48, 0x8401},
+ {0x3E4A, 0x00FF},
+ {0x3E4C, 0x8402},
+ {0x3E4E, 0x8984},
+ {0x3E50, 0x6628},
+ {0x3E52, 0x8340},
+ {0x3E54, 0x00FF},
+ {0x3E56, 0x4A42},
+ {0x3E58, 0x2703},
+ {0x3E5A, 0x6752},
+ {0x3E5C, 0x3F2A},
+ {0x3E5E, 0x846A},
+ {0x3E60, 0x4C01},
+ {0x3E62, 0x8401},
+ {0x3E66, 0x3901},
+ {0x3E90, 0x2C01},
+ {0x3E98, 0x2B02},
+ {0x3E92, 0x2A04},
+ {0x3E94, 0x2509},
+ {0x3E96, 0x0000},
+ {0x3E9A, 0x2905},
+ {0x3E9C, 0x00FF},
+ {0x3ECC, 0x00EB},
+ {0x3ED0, 0x1E24},
+ {0x3ED4, 0xAFC4},
+ {0x3ED6, 0x909B},
+ {0x3EE0, 0x2424},
+ {0x3EE2, 0x9797},
+ {0x3EE4, 0xC100},
+ {0x3EE6, 0x0540},
+ {0x3174, 0x8000},
+
+ /* mode end */
+ {0x0300, 0x0004}, /* VT_PIX_CLK_DIV */
+ {0x0302, 0x0001}, /* VT_SYS_CLK_DIV */
+ {0x0304, 0x0002}, /* PRE_PLL_CLK_DIV */
+ {0x0306, 0x0040}, /* PLL_MULTIPLIER */
+ {0x0308, 0x000A}, /* OP_PIX_CLK_DIV */
+ {0x030A, 0x0001}, /* OP_SYS_CLK_DIV */
+ {ar0832_TABLE_WAIT_MS, 0x0001},
+ {0x3064, 0x7400}, /* RESERVED_MFR_3064 */
+ {0x0104, 0x0100}, /* GROUPED_PARAMETER_HOLD */
+ {0x0344, 0x028C}, /* X_ADDR_START */
+ {0x0348, 0x0A0B}, /* X_ADDR_END */
+ {0x0346, 0x006E}, /* Y_ADDR_START */
+ {0x034A, 0x04A5}, /* Y_ADDR_END */
+ {0x034C, 0x0780}, /* X_OUTPUT_SIZE */
+ {0x034E, 0x0438}, /* Y_OUTPUT_SIZE */
+ {0x3040, 0xC041}, /* READ_MODE */
{0x306E, 0xFC80}, /* DATAPATH_SELECT */
- {0x30B2, 0xC000}, /* RESERVED_MFR_30B2 */
- {0x30D6, 0x0800}, /* RESERVED_MFR_30D6 */
- {0x316C, 0xB42F}, /* RESERVED_MFR_316C */
- {0x316E, 0x869A}, /* RESERVED_MFR_316E */
- {0x3170, 0x210E}, /* RESERVED_MFR_3170 */
- {0x317A, 0x010E}, /* RESERVED_MFR_317A */
- {0x31E0, 0x1FB9}, /* RESERVED_MFR_31E0 */
- {0x31E6, 0x07FC}, /* RESERVED_MFR_31E6 */
- {0x37C0, 0x0000}, /* P_GR_Q5 */
- {0x37C2, 0x0000}, /* P_RD_Q5 */
- {0x37C4, 0x0000}, /* P_BL_Q5 */
- {0x37C6, 0x0000}, /* P_GB_Q5 */
- {0x3E00, 0x0011}, /* RESERVED_MFR_3E00 */
- {0x3E02, 0x8801}, /* RESERVED_MFR_3E02 */
- {0x3E04, 0x2801}, /* RESERVED_MFR_3E04 */
- {0x3E06, 0x8449}, /* RESERVED_MFR_3E06 */
- {0x3E08, 0x6841}, /* RESERVED_MFR_3E08 */
- {0x3E0A, 0x400C}, /* RESERVED_MFR_3E0A */
- {0x3E0C, 0x1001}, /* RESERVED_MFR_3E0C */
- {0x3E0E, 0x2603}, /* RESERVED_MFR_3E0E */
- {0x3E10, 0x4B41}, /* RESERVED_MFR_3E10 */
- {0x3E12, 0x4B24}, /* RESERVED_MFR_3E12 */
- {0x3E14, 0xA3CF}, /* RESERVED_MFR_3E14 */
- {0x3E16, 0x8802}, /* RESERVED_MFR_3E16 */
- {0x3E18, 0x84FF}, /* RESERVED_MFR_3E18 */
- {0x3E1A, 0x8601}, /* RESERVED_MFR_3E1A */
- {0x3E1C, 0x8401}, /* RESERVED_MFR_3E1C */
- {0x3E1E, 0x840A}, /* RESERVED_MFR_3E1E */
- {0x3E20, 0xFF00}, /* RESERVED_MFR_3E20 */
- {0x3E22, 0x8401}, /* RESERVED_MFR_3E22 */
- {0x3E24, 0x00FF}, /* RESERVED_MFR_3E24 */
- {0x3E26, 0x0088}, /* RESERVED_MFR_3E26 */
- {0x3E28, 0x2E8A}, /* RESERVED_MFR_3E28 */
- {0x3E30, 0x0000}, /* RESERVED_MFR_3E30 */
- {0x3E32, 0x8801}, /* RESERVED_MFR_3E32 */
- {0x3E34, 0x4029}, /* RESERVED_MFR_3E34 */
- {0x3E36, 0x00FF}, /* RESERVED_MFR_3E36 */
- {0x3E38, 0x8469}, /* RESERVED_MFR_3E38 */
- {0x3E3A, 0x00FF}, /* RESERVED_MFR_3E3A */
- {0x3E3C, 0x2801}, /* RESERVED_MFR_3E3C */
- {0x3E3E, 0x3E2A}, /* RESERVED_MFR_3E3E */
- {0x3E40, 0x1C01}, /* RESERVED_MFR_3E40 */
- {0x3E42, 0xFF84}, /* RESERVED_MFR_3E42 */
- {0x3E44, 0x8401}, /* RESERVED_MFR_3E44 */
- {0x3E46, 0x0C01}, /* RESERVED_MFR_3E46 */
- {0x3E48, 0x8401}, /* RESERVED_MFR_3E48 */
- {0x3E4A, 0x00FF}, /* RESERVED_MFR_3E4A */
- {0x3E4C, 0x8402}, /* RESERVED_MFR_3E4C */
- {0x3E4E, 0x8984}, /* RESERVED_MFR_3E4E */
- {0x3E50, 0x6628}, /* RESERVED_MFR_3E50 */
- {0x3E52, 0x8340}, /* RESERVED_MFR_3E52 */
- {0x3E54, 0x00FF}, /* RESERVED_MFR_3E54 */
- {0x3E56, 0x4A42}, /* RESERVED_MFR_3E56 */
- {0x3E58, 0x2703}, /* RESERVED_MFR_3E58 */
- {0x3E5A, 0x6752}, /* RESERVED_MFR_3E5A */
- {0x3E5C, 0x3F2A}, /* RESERVED_MFR_3E5C */
- {0x3E5E, 0x846A}, /* RESERVED_MFR_3E5E */
- {0x3E60, 0x4C01}, /* RESERVED_MFR_3E60 */
- {0x3E62, 0x8401}, /* RESERVED_MFR_3E62 */
- {0x3E66, 0x3901}, /* RESERVED_MFR_3E66 */
- {0x3E90, 0x2C01}, /* RESERVED_MFR_3E90 */
- {0x3E98, 0x2B02}, /* RESERVED_MFR_3E98 */
- {0x3E92, 0x2A04}, /* RESERVED_MFR_3E92 */
- {0x3E94, 0x2509}, /* RESERVED_MFR_3E94 */
- {0x3E96, 0x0000}, /* RESERVED_MFR_3E96 */
- {0x3E9A, 0x2905}, /* RESERVED_MFR_3E9A */
- {0x3E9C, 0x00FF}, /* RESERVED_MFR_3E9C */
- {0x3ECC, 0x00EB}, /* RESERVED_MFR_3ECC */
+ {0x0400, 0x0000}, /* SCALING_MODE */
+ {0x0404, 0x0010}, /* SCALE_M */
+ {0x3178, 0x0000}, /* RESERVED_MFR_3178 */
{0x3ED0, 0x1E24}, /* RESERVED_MFR_3ED0 */
- {0x3ED4, 0xAFC4}, /* RESERVED_MFR_3ED4 */
- {0x3ED6, 0x909B}, /* RESERVED_MFR_3ED6 */
- {0x3EE0, 0x2424}, /* RESERVED_MFR_3EE0 */
- {0x3EE2, 0x9797}, /* RESERVED_MFR_3EE2 */
- {0x3EE4, 0xC100}, /* RESERVED_MFR_3EE4 */
- {0x3EE6, 0x0540}, /* RESERVED_MFR_3EE6 */
- {0x3174, 0x8000}, /* RESERVED_MFR_3174 */
+
+ {0x0342, 0x103B}, /* LINE_LENGTH_PCK */
+ {0x0340, 0x05C4}, /* FRAME_LENGTH_LINES */
+ {0x0202, 0x05C4}, /* COARSE_INTEGRATION_TIME */
+ {0x3014, 0x0702}, /* FINE_INTEGRATION_TIME */
+ {0x3010, 0x0078}, /* FINE_CORRECTION */
+ {0x301A, 0x8250}, /* RESET_REGISTER */
+ {0x301A, 0x8650}, /* RESET_REGISTER */
+ {0x301A, 0x8658}, /* RESET_REGISTER */
+ /* gain */
+ {0x3056, 0x10AA}, /* gain */
+ {0x3058, 0x10AA}, /* gain */
+ {0x305a, 0x10AA}, /* gain */
+ {0x305c, 0x10AA}, /* gain */
+ {0x0104, 0x0000}, /* GROUPED_PARAMETER_HOLD */
+ {0x301A, 0x065C}, /* RESET_REGISTER */
+ {ar0832_TABLE_END, 0x0000}
+};
+
+static struct ar0832_reg mode_1920X1080_8141[] = {
+ /* mode start */
+ {0x301A, 0x0058}, /* RESET_REGISTER */
+ {0x301A, 0x0050}, /* RESET_REGISTER */
+ {0x0104, 0x0100}, /* GROUPED_PARAMETER_HOLD */
+ {0x3064, 0x7800}, /* RESERVED_MFR_3064 */
+ {0x31AE, 0x0202}, /* SERIAL_FORMAT */
+ /* AR0832 Recommended Settings */
+ {0x3044, 0x0590},
+ {0x306E, 0xFC80},
+ {0x30B2, 0xC000},
+ {0x30D6, 0x0800},
+ {0x316C, 0xB42F},
+ {0x316E, 0x869A},
+ {0x3170, 0x210E},
+ {0x317A, 0x010E},
+ {0x31E0, 0x1FB9},
+ {0x31E6, 0x07FC},
+ {0x37C0, 0x0000},
+ {0x37C2, 0x0000},
+ {0x37C4, 0x0000},
+ {0x37C6, 0x0000},
+ {0x3E00, 0x0011},
+ {0x3E02, 0x8801},
+ {0x3E04, 0x2801},
+ {0x3E06, 0x8449},
+ {0x3E08, 0x6841},
+ {0x3E0A, 0x400C},
+ {0x3E0C, 0x1001},
+ {0x3E0E, 0x2603},
+ {0x3E10, 0x4B41},
+ {0x3E12, 0x4B24},
+ {0x3E14, 0xA3CF},
+ {0x3E16, 0x8802},
+ {0x3E18, 0x8401},
+ {0x3E1A, 0x8601},
+ {0x3E1C, 0x8401},
+ {0x3E1E, 0x840A},
+ {0x3E20, 0xFF00},
+ {0x3E22, 0x8401},
+ {0x3E24, 0x00FF},
+ {0x3E26, 0x0088},
+ {0x3E28, 0x2E8A},
+ {0x3E30, 0x0000},
+ {0x3E32, 0x8801},
+ {0x3E34, 0x4029},
+ {0x3E36, 0x00FF},
+ {0x3E38, 0x8469},
+ {0x3E3A, 0x00FF},
+ {0x3E3C, 0x2801},
+ {0x3E3E, 0x3E2A},
+ {0x3E40, 0x1C01},
+ {0x3E42, 0xFF84},
+ {0x3E44, 0x8401},
+ {0x3E46, 0x0C01},
+ {0x3E48, 0x8401},
+ {0x3E4A, 0x00FF},
+ {0x3E4C, 0x8402},
+ {0x3E4E, 0x8984},
+ {0x3E50, 0x6628},
+ {0x3E52, 0x8340},
+ {0x3E54, 0x00FF},
+ {0x3E56, 0x4A42},
+ {0x3E58, 0x2703},
+ {0x3E5A, 0x6752},
+ {0x3E5C, 0x3F2A},
+ {0x3E5E, 0x846A},
+ {0x3E60, 0x4C01},
+ {0x3E62, 0x8401},
+ {0x3E66, 0x3901},
+ {0x3E90, 0x2C01},
+ {0x3E98, 0x2B02},
+ {0x3E92, 0x2A04},
+ {0x3E94, 0x2509},
+ {0x3E96, 0x0000},
+ {0x3E9A, 0x2905},
+ {0x3E9C, 0x00FF},
+ {0x3ECC, 0x00EB},
+ {0x3ED0, 0x1E24},
+ {0x3ED4, 0xAFC4},
+ {0x3ED6, 0x909B},
+ {0x3EE0, 0x2424},
+ {0x3EE2, 0x9797},
+ {0x3EE4, 0xC100},
+ {0x3EE6, 0x0540},
+ {0x3174, 0x8000},
+
+ /* mode end */
{0x0300, 0x0004}, /* VT_PIX_CLK_DIV */
{0x0302, 0x0001}, /* VT_SYS_CLK_DIV */
{0x0304, 0x0002}, /* PRE_PLL_CLK_DIV */
@@ -487,7 +884,8 @@ static struct ar0832_reg mode_1920X1080[] = {
{ar0832_TABLE_END, 0x0000}
};
-static struct ar0832_reg mode_1632X1224[] = {
+static struct ar0832_reg mode_1632X1224_8140[] = {
+ /* mode start */
{0x301A, 0x0058}, /* RESET_REGISTER */
{0x301A, 0x0050}, /* RESET_REGISTER */
@@ -496,6 +894,7 @@ static struct ar0832_reg mode_1632X1224[] = {
{0x3064, 0x7800}, /* RESERVED_MFR_3064 */
{0x31AE, 0x0202}, /* SERIAL_FORMAT */
+ /* MT9E013 Recommended Settings */
{0x31B0, 0x0083}, /* FRAME_PREAMBLE */
{0x31B2, 0x004D}, /* LINE_PREAMBLE */
{0x31B4, 0x0E77}, /* MIPI_TIMING_0 */
@@ -505,84 +904,234 @@ static struct ar0832_reg mode_1632X1224[] = {
{0x31BC, 0x2A0D}, /* MIPI_TIMING_4 */
{ar0832_TABLE_WAIT_MS, 0x0005},
{0x0112, 0x0A0A}, /* CCP_DATA_FORMAT */
- {0x3044, 0x0590}, /* RESERVED_MFR_3044 */
+ {0x3044, 0x0590},
+ {0x306E, 0xFC80},
+ {0x30B2, 0xC000},
+ {0x30D6, 0x0800},
+ {0x316C, 0xB42F},
+ {0x316E, 0x869A},
+ {0x3170, 0x210E},
+ {0x317A, 0x010E},
+ {0x31E0, 0x1FB9},
+ {0x31E6, 0x07FC},
+ {0x37C0, 0x0000},
+ {0x37C2, 0x0000},
+ {0x37C4, 0x0000},
+ {0x37C6, 0x0000},
+ {0x3E00, 0x0011},
+ {0x3E02, 0x8801},
+ {0x3E04, 0x2801},
+ {0x3E06, 0x8449},
+ {0x3E08, 0x6841},
+ {0x3E0A, 0x400C},
+ {0x3E0C, 0x1001},
+ {0x3E0E, 0x2603},
+ {0x3E10, 0x4B41},
+ {0x3E12, 0x4B24},
+ {0x3E14, 0xA3CF},
+ {0x3E16, 0x8802},
+ {0x3E18, 0x8401},
+ {0x3E1A, 0x8601},
+ {0x3E1C, 0x8401},
+ {0x3E1E, 0x840A},
+ {0x3E20, 0xFF00},
+ {0x3E22, 0x8401},
+ {0x3E24, 0x00FF},
+ {0x3E26, 0x0088},
+ {0x3E28, 0x2E8A},
+ {0x3E30, 0x0000},
+ {0x3E32, 0x8801},
+ {0x3E34, 0x4029},
+ {0x3E36, 0x00FF},
+ {0x3E38, 0x8469},
+ {0x3E3A, 0x00FF},
+ {0x3E3C, 0x2801},
+ {0x3E3E, 0x3E2A},
+ {0x3E40, 0x1C01},
+ {0x3E42, 0xFF84},
+ {0x3E44, 0x8401},
+ {0x3E46, 0x0C01},
+ {0x3E48, 0x8401},
+ {0x3E4A, 0x00FF},
+ {0x3E4C, 0x8402},
+ {0x3E4E, 0x8984},
+ {0x3E50, 0x6628},
+ {0x3E52, 0x8340},
+ {0x3E54, 0x00FF},
+ {0x3E56, 0x4A42},
+ {0x3E58, 0x2703},
+ {0x3E5A, 0x6752},
+ {0x3E5C, 0x3F2A},
+ {0x3E5E, 0x846A},
+ {0x3E60, 0x4C01},
+ {0x3E62, 0x8401},
+ {0x3E66, 0x3901},
+ {0x3E90, 0x2C01},
+ {0x3E98, 0x2B02},
+ {0x3E92, 0x2A04},
+ {0x3E94, 0x2509},
+ {0x3E96, 0x0000},
+ {0x3E9A, 0x2905},
+ {0x3E9C, 0x00FF},
+ {0x3ECC, 0x00EB},
+ {0x3ED0, 0x1E24},
+ {0x3ED4, 0xAFC4},
+ {0x3ED6, 0x909B},
+ {0x3EE0, 0x2424},
+ {0x3EE2, 0x9797},
+ {0x3EE4, 0xC100},
+ {0x3EE6, 0x0540},
+ {0x3174, 0x8000},
+
+ /* mode end */
+ {0x0300, 0x0004}, /* VT_PIX_CLK_DIV */
+ {0x0302, 0x0001}, /* VT_SYS_CLK_DIV */
+ {0x0304, 0x0002}, /* PRE_PLL_CLK_DIV */
+
+ {0x0306, 0x0040}, /* PLL_MULTIPLIER */
+
+ {0x0308, 0x000A}, /* OP_PIX_CLK_DIV */
+ {0x030A, 0x0001}, /* OP_SYS_CLK_DIV */
+ {ar0832_TABLE_WAIT_MS, 0x0001}, /* waitmsec 1 */
+
+ {0x3064, 0x7400}, /* RESERVED_MFR_3064 */
+
+ {0x0104, 0x0100}, /* GROUPED_PARAMETER_HOLD */
+
+ {0x0344, 0x0008}, /* X_ADDR_START */
+ {0x0348, 0x0CC9}, /* X_ADDR_END */
+ {0x0346, 0x0008}, /* Y_ADDR_START */
+ {0x034A, 0x0999}, /* Y_ADDR_END */
+ {0x034C, 0x0660}, /* X_OUTPUT_SIZE */
+ {0x034E, 0x04C8}, /* Y_OUTPUT_SIZE */
+ {0x3040, 0xC4C3}, /* READ_MODE */
{0x306E, 0xFC80}, /* DATAPATH_SELECT */
- {0x30B2, 0xC000}, /* RESERVED_MFR_30B2 */
- {0x30D6, 0x0800}, /* RESERVED_MFR_30D6 */
- {0x316C, 0xB42F}, /* RESERVED_MFR_316C */
- {0x316E, 0x869A}, /* RESERVED_MFR_316E */
- {0x3170, 0x210E}, /* RESERVED_MFR_3170 */
- {0x317A, 0x010E}, /* RESERVED_MFR_317A */
- {0x31E0, 0x1FB9}, /* RESERVED_MFR_31E0 */
- {0x31E6, 0x07FC}, /* RESERVED_MFR_31E6 */
- {0x37C0, 0x0000}, /* P_GR_Q5 */
- {0x37C2, 0x0000}, /* P_RD_Q5 */
- {0x37C4, 0x0000}, /* P_BL_Q5 */
- {0x37C6, 0x0000}, /* P_GB_Q5 */
- {0x3E00, 0x0011}, /* RESERVED_MFR_3E00 */
- {0x3E02, 0x8801}, /* RESERVED_MFR_3E02 */
- {0x3E04, 0x2801}, /* RESERVED_MFR_3E04 */
- {0x3E06, 0x8449}, /* RESERVED_MFR_3E06 */
- {0x3E08, 0x6841}, /* RESERVED_MFR_3E08 */
- {0x3E0A, 0x400C}, /* RESERVED_MFR_3E0A */
- {0x3E0C, 0x1001}, /* RESERVED_MFR_3E0C */
- {0x3E0E, 0x2603}, /* RESERVED_MFR_3E0E */
- {0x3E10, 0x4B41}, /* RESERVED_MFR_3E10 */
- {0x3E12, 0x4B24}, /* RESERVED_MFR_3E12 */
- {0x3E14, 0xA3CF}, /* RESERVED_MFR_3E14 */
- {0x3E16, 0x8802}, /* RESERVED_MFR_3E16 */
- {0x3E18, 0x84FF}, /* RESERVED_MFR_3E18 */
- {0x3E1A, 0x8601}, /* RESERVED_MFR_3E1A */
- {0x3E1C, 0x8401}, /* RESERVED_MFR_3E1C */
- {0x3E1E, 0x840A}, /* RESERVED_MFR_3E1E */
- {0x3E20, 0xFF00}, /* RESERVED_MFR_3E20 */
- {0x3E22, 0x8401}, /* RESERVED_MFR_3E22 */
- {0x3E24, 0x00FF}, /* RESERVED_MFR_3E24 */
- {0x3E26, 0x0088}, /* RESERVED_MFR_3E26 */
- {0x3E28, 0x2E8A}, /* RESERVED_MFR_3E28 */
- {0x3E30, 0x0000}, /* RESERVED_MFR_3E30 */
- {0x3E32, 0x8801}, /* RESERVED_MFR_3E32 */
- {0x3E34, 0x4029}, /* RESERVED_MFR_3E34 */
- {0x3E36, 0x00FF}, /* RESERVED_MFR_3E36 */
- {0x3E38, 0x8469}, /* RESERVED_MFR_3E38 */
- {0x3E3A, 0x00FF}, /* RESERVED_MFR_3E3A */
- {0x3E3C, 0x2801}, /* RESERVED_MFR_3E3C */
- {0x3E3E, 0x3E2A}, /* RESERVED_MFR_3E3E */
- {0x3E40, 0x1C01}, /* RESERVED_MFR_3E40 */
- {0x3E42, 0xFF84}, /* RESERVED_MFR_3E42 */
- {0x3E44, 0x8401}, /* RESERVED_MFR_3E44 */
- {0x3E46, 0x0C01}, /* RESERVED_MFR_3E46 */
- {0x3E48, 0x8401}, /* RESERVED_MFR_3E48 */
- {0x3E4A, 0x00FF}, /* RESERVED_MFR_3E4A */
- {0x3E4C, 0x8402}, /* RESERVED_MFR_3E4C */
- {0x3E4E, 0x8984}, /* RESERVED_MFR_3E4E */
- {0x3E50, 0x6628}, /* RESERVED_MFR_3E50 */
- {0x3E52, 0x8340}, /* RESERVED_MFR_3E52 */
- {0x3E54, 0x00FF}, /* RESERVED_MFR_3E54 */
- {0x3E56, 0x4A42}, /* RESERVED_MFR_3E56 */
- {0x3E58, 0x2703}, /* RESERVED_MFR_3E58 */
- {0x3E5A, 0x6752}, /* RESERVED_MFR_3E5A */
- {0x3E5C, 0x3F2A}, /* RESERVED_MFR_3E5C */
- {0x3E5E, 0x846A}, /* RESERVED_MFR_3E5E */
- {0x3E60, 0x4C01}, /* RESERVED_MFR_3E60 */
- {0x3E62, 0x8401}, /* RESERVED_MFR_3E62 */
- {0x3E66, 0x3901}, /* RESERVED_MFR_3E66 */
- {0x3E90, 0x2C01}, /* RESERVED_MFR_3E90 */
- {0x3E98, 0x2B02}, /* RESERVED_MFR_3E98 */
- {0x3E92, 0x2A04}, /* RESERVED_MFR_3E92 */
- {0x3E94, 0x2509}, /* RESERVED_MFR_3E94 */
- {0x3E96, 0x0000}, /* RESERVED_MFR_3E96 */
- {0x3E9A, 0x2905}, /* RESERVED_MFR_3E9A */
- {0x3E9C, 0x00FF}, /* RESERVED_MFR_3E9C */
- {0x3ECC, 0x00EB}, /* RESERVED_MFR_3ECC */
+ {0x3178, 0x0000}, /* RESERVED_MFR_3178 */
{0x3ED0, 0x1E24}, /* RESERVED_MFR_3ED0 */
- {0x3ED4, 0xAFC4}, /* RESERVED_MFR_3ED4 */
- {0x3ED6, 0x909B}, /* RESERVED_MFR_3ED6 */
- {0x3EE0, 0x2424}, /* RESERVED_MFR_3EE0 */
- {0x3EE2, 0x9797}, /* RESERVED_MFR_3EE2 */
- {0x3EE4, 0xC100}, /* RESERVED_MFR_3EE4 */
- {0x3EE6, 0x0540}, /* RESERVED_MFR_3EE6 */
- {0x3174, 0x8000}, /* RESERVED_MFR_3174 */
+ {0x0400, 0x0002}, /* SCALING_MODE */
+ {0x0404, 0x0010}, /* SCALE_M */
+ {0x0342, 0x101A}, /* LINE_LENGTH_PCK */
+ {0x0340, 0x0610}, /* FRAME_LENGTH_LINES */
+ {0x0202, 0x0557}, /* COARSE_INTEGRATION_TIME */
+ {0x3014, 0x0988}, /* FINE_INTEGRATION_TIME */
+ {0x3010, 0x0130}, /* FINE_CORRECTION */
+ {0x301A, 0x8250}, /* RESET_REGISTER */
+ {0x301A, 0x8650}, /* RESET_REGISTER */
+ {0x301A, 0x8658}, /* RESET_REGISTER */
+
+ /* gain */
+ {0x3056, 0x10AA}, /* gain */
+ {0x3058, 0x10AA}, /* gain */
+ {0x305a, 0x10AA}, /* gain */
+ {0x305c, 0x10AA}, /* gain */
+
+ /* todo 8-bit write */
+ {0x0104, 0x0000}, /* GROUPED_PARAMETER_HOLD */
+
+ {0x301A, 0x065C}, /* RESET_REGISTER */
+ {ar0832_TABLE_END, 0x0000}
+};
+
+static struct ar0832_reg mode_1632X1224_8141[] = {
+ /* mode start */
+ {0x301A, 0x0058}, /* RESET_REGISTER */
+ {0x301A, 0x0050}, /* RESET_REGISTER */
+
+ /* SC-CHANGE: to-do 8 bit write */
+ {0x0104, 0x0100}, /* GROUPED_PARAMETER_HOLD */
+
+ {0x3064, 0x7800}, /* RESERVED_MFR_3064 */
+ {0x31AE, 0x0202}, /* SERIAL_FORMAT */
+ /* AR0832 Recommended Settings */
+ {0x31B0, 0x0083}, /* FRAME_PREAMBLE */
+ {0x31B2, 0x004D}, /* LINE_PREAMBLE */
+ {0x31B4, 0x0E77}, /* MIPI_TIMING_0 */
+ {0x31B6, 0x0D20}, /* MIPI_TIMING_1 */
+ {0x31B8, 0x020E}, /* MIPI_TIMING_2 */
+ {0x31BA, 0x0710}, /* MIPI_TIMING_3 */
+ {0x31BC, 0x2A0D}, /* MIPI_TIMING_4 */
+ {ar0832_TABLE_WAIT_MS, 0x0005},
+ {0x0112, 0x0A0A}, /* CCP_DATA_FORMAT */
+ {0x3044, 0x0590},
+ {0x306E, 0xFC80},
+ {0x30B2, 0xC000},
+ {0x30D6, 0x0800},
+ {0x316C, 0xB42F},
+ {0x316E, 0x869A},
+ {0x3170, 0x210E},
+ {0x317A, 0x010E},
+ {0x31E0, 0x1FB9},
+ {0x31E6, 0x07FC},
+ {0x37C0, 0x0000},
+ {0x37C2, 0x0000},
+ {0x37C4, 0x0000},
+ {0x37C6, 0x0000},
+ {0x3E00, 0x0011},
+ {0x3E02, 0x8801},
+ {0x3E04, 0x2801},
+ {0x3E06, 0x8449},
+ {0x3E08, 0x6841},
+ {0x3E0A, 0x400C},
+ {0x3E0C, 0x1001},
+ {0x3E0E, 0x2603},
+ {0x3E10, 0x4B41},
+ {0x3E12, 0x4B24},
+ {0x3E14, 0xA3CF},
+ {0x3E16, 0x8802},
+ {0x3E18, 0x8401},
+ {0x3E1A, 0x8601},
+ {0x3E1C, 0x8401},
+ {0x3E1E, 0x840A},
+ {0x3E20, 0xFF00},
+ {0x3E22, 0x8401},
+ {0x3E24, 0x00FF},
+ {0x3E26, 0x0088},
+ {0x3E28, 0x2E8A},
+ {0x3E30, 0x0000},
+ {0x3E32, 0x8801},
+ {0x3E34, 0x4029},
+ {0x3E36, 0x00FF},
+ {0x3E38, 0x8469},
+ {0x3E3A, 0x00FF},
+ {0x3E3C, 0x2801},
+ {0x3E3E, 0x3E2A},
+ {0x3E40, 0x1C01},
+ {0x3E42, 0xFF84},
+ {0x3E44, 0x8401},
+ {0x3E46, 0x0C01},
+ {0x3E48, 0x8401},
+ {0x3E4A, 0x00FF},
+ {0x3E4C, 0x8402},
+ {0x3E4E, 0x8984},
+ {0x3E50, 0x6628},
+ {0x3E52, 0x8340},
+ {0x3E54, 0x00FF},
+ {0x3E56, 0x4A42},
+ {0x3E58, 0x2703},
+ {0x3E5A, 0x6752},
+ {0x3E5C, 0x3F2A},
+ {0x3E5E, 0x846A},
+ {0x3E60, 0x4C01},
+ {0x3E62, 0x8401},
+ {0x3E66, 0x3901},
+ {0x3E90, 0x2C01},
+ {0x3E98, 0x2B02},
+ {0x3E92, 0x2A04},
+ {0x3E94, 0x2509},
+ {0x3E96, 0x0000},
+ {0x3E9A, 0x2905},
+ {0x3E9C, 0x00FF},
+ {0x3ECC, 0x00EB},
+ {0x3ED0, 0x1E24},
+ {0x3ED4, 0xAFC4},
+ {0x3ED6, 0x909B},
+ {0x3EE0, 0x2424},
+ {0x3EE2, 0x9797},
+ {0x3EE4, 0xC100},
+ {0x3EE6, 0x0540},
+ {0x3174, 0x8000},
+
+ /* mode end */
{0x0300, 0x0004}, /* VT_PIX_CLK_DIV */
{0x0302, 0x0001}, /* VT_SYS_CLK_DIV */
{0x0304, 0x0002}, /* PRE_PLL_CLK_DIV */
@@ -632,7 +1181,149 @@ static struct ar0832_reg mode_1632X1224[] = {
};
-static struct ar0832_reg mode_800X600[] = {
+static struct ar0832_reg mode_800X600_8140[] = {
+ /* mode start */
+ {0x301A, 0x0058},
+ {0x301A, 0x0050},
+ {0x0104, 0x0100},
+ {0x3064, 0x7800},
+ {0x31AE, 0x0202},
+ {0x31B8, 0x0E3F},
+ {0x31BE, 0xC003},
+ {0x3070, 0x0000},
+ {ar0832_TABLE_WAIT_MS, 0x0005},
+
+ /* MT9E013 Recommended Settings */
+ {0x3044, 0x0590},
+ {0x306E, 0xFC80},
+ {0x30B2, 0xC000},
+ {0x30D6, 0x0800},
+ {0x316C, 0xB42F},
+ {0x316E, 0x869A},
+ {0x3170, 0x210E},
+ {0x317A, 0x010E},
+ {0x31E0, 0x1FB9},
+ {0x31E6, 0x07FC},
+ {0x37C0, 0x0000},
+ {0x37C2, 0x0000},
+ {0x37C4, 0x0000},
+ {0x37C6, 0x0000},
+ {0x3E00, 0x0011},
+ {0x3E02, 0x8801},
+ {0x3E04, 0x2801},
+ {0x3E06, 0x8449},
+ {0x3E08, 0x6841},
+ {0x3E0A, 0x400C},
+ {0x3E0C, 0x1001},
+ {0x3E0E, 0x2603},
+ {0x3E10, 0x4B41},
+ {0x3E12, 0x4B24},
+ {0x3E14, 0xA3CF},
+ {0x3E16, 0x8802},
+ {0x3E18, 0x8401},
+ {0x3E1A, 0x8601},
+ {0x3E1C, 0x8401},
+ {0x3E1E, 0x840A},
+ {0x3E20, 0xFF00},
+ {0x3E22, 0x8401},
+ {0x3E24, 0x00FF},
+ {0x3E26, 0x0088},
+ {0x3E28, 0x2E8A},
+ {0x3E30, 0x0000},
+ {0x3E32, 0x8801},
+ {0x3E34, 0x4029},
+ {0x3E36, 0x00FF},
+ {0x3E38, 0x8469},
+ {0x3E3A, 0x00FF},
+ {0x3E3C, 0x2801},
+ {0x3E3E, 0x3E2A},
+ {0x3E40, 0x1C01},
+ {0x3E42, 0xFF84},
+ {0x3E44, 0x8401},
+ {0x3E46, 0x0C01},
+ {0x3E48, 0x8401},
+ {0x3E4A, 0x00FF},
+ {0x3E4C, 0x8402},
+ {0x3E4E, 0x8984},
+ {0x3E50, 0x6628},
+ {0x3E52, 0x8340},
+ {0x3E54, 0x00FF},
+ {0x3E56, 0x4A42},
+ {0x3E58, 0x2703},
+ {0x3E5A, 0x6752},
+ {0x3E5C, 0x3F2A},
+ {0x3E5E, 0x846A},
+ {0x3E60, 0x4C01},
+ {0x3E62, 0x8401},
+ {0x3E66, 0x3901},
+ {0x3E90, 0x2C01},
+ {0x3E98, 0x2B02},
+ {0x3E92, 0x2A04},
+ {0x3E94, 0x2509},
+ {0x3E96, 0x0000},
+ {0x3E9A, 0x2905},
+ {0x3E9C, 0x00FF},
+ {0x3ECC, 0x00EB},
+ {0x3ED0, 0x1E24},
+ {0x3ED4, 0xAFC4},
+ {0x3ED6, 0x909B},
+ {0x3EE0, 0x2424},
+ {0x3EE2, 0x9797},
+ {0x3EE4, 0xC100},
+ {0x3EE6, 0x0540},
+
+ /* mode end */
+ {0x3174, 0x8000},
+ /* STATE= Minimum Gain, 1500 */
+ {0x305E, 0x13AF},
+
+ /* [RAW10] */
+ {0x0112, 0x0A0A},
+
+ /* PLL Configuration Ext=24MHz */
+ {0x0300, 0x0004},
+ {0x0302, 0x0001},
+ {0x0304, 0x0002},
+ {0x0306, 0x0042},
+ {0x0308, 0x000A},
+ {0x030A, 0x0001},
+ {ar0832_TABLE_WAIT_MS, 0x0001},
+
+ /* Output size */
+ {0x0344, 0x04D8},
+ {0x0348, 0x07F7},
+ {0x0346, 0x03A4},
+ {0x034A, 0x05FB},
+ {0x034C, 0x0320},
+ {0x034E, 0x0258},
+ {0x3040, 0x0041},
+
+ {0x306E, 0xFC80},
+ {0x3178, 0x0000},
+ {0x3ED0, 0x1E24},
+
+ /* Scale Configuration */
+ {0x0400, 0x0000},
+ {0x0404, 0x0010},
+
+ /* Timing Configuration */
+ {0x0342, 0x08A8},
+ {0x0340, 0x02E7},
+ {0x0202, 0x02E7},
+ {0x3014, 0x03F6},
+ {0x3010, 0x0078},
+
+ {0x301A, 0x8250},
+ {0x301A, 0x8650},
+ {0x301A, 0x8658},
+ {0x0104, 0x0000},
+
+ {0x301A, 0x065C},
+ {ar0832_TABLE_END, 0x0000}
+};
+
+static struct ar0832_reg mode_800X600_8141[] = {
+ /* mode start */
{0x301A, 0x0058}, /* RESET_REGISTER */
{0x301A, 0x0050}, /* RESET_REGISTER */
@@ -641,6 +1332,7 @@ static struct ar0832_reg mode_800X600[] = {
{0x3064, 0x7800}, /* RESERVED_MFR_3064 */
{0x31AE, 0x0202}, /* SERIAL_FORMAT */
+ /* AR0832 Recommended Settings */
{0x31B0, 0x0083}, /* FRAME_PREAMBLE */
{0x31B2, 0x004D}, /* LINE_PREAMBLE */
{0x31B4, 0x0E88}, /* MIPI_TIMING_0 */
@@ -727,6 +1419,8 @@ static struct ar0832_reg mode_800X600[] = {
{0x3EE2, 0x9797}, /* RESERVED_MFR_3EE2 */
{0x3EE4, 0xC100}, /* RESERVED_MFR_3EE4 */
{0x3EE6, 0x0540}, /* RESERVED_MFR_3EE6 */
+
+ /* mode end */
{0x3174, 0x8000}, /* RESERVED_MFR_3174 */
{0x0300, 0x0004}, /* VT_PIX_CLK_DIV */
{0x0302, 0x0001}, /* VT_SYS_CLK_DIV */
@@ -788,12 +1482,20 @@ enum {
ar0832_MODE_800X600
};
-static struct ar0832_reg *mode_table[] = {
- [ar0832_MODE_3264X2448] = mode_3264X2448,
- [ar0832_MODE_2880X1620] = mode_2880X1620,
- [ar0832_MODE_1920X1080] = mode_1920X1080,
- [ar0832_MODE_1632X1224] = mode_1632X1224,
- [ar0832_MODE_800X600] = mode_800X600,
+static struct ar0832_reg *mode_table_8140[] = {
+ [ar0832_MODE_3264X2448] = mode_3264X2448_8140,
+ [ar0832_MODE_2880X1620] = mode_2880X1620_8140,
+ [ar0832_MODE_1920X1080] = mode_1920X1080_8140,
+ [ar0832_MODE_1632X1224] = mode_1632X1224_8140,
+ [ar0832_MODE_800X600] = mode_800X600_8140,
+};
+
+static struct ar0832_reg *mode_table_8141[] = {
+ [ar0832_MODE_3264X2448] = mode_3264X2448_8141,
+ [ar0832_MODE_2880X1620] = mode_2880X1620_8141,
+ [ar0832_MODE_1920X1080] = mode_1920X1080_8141,
+ [ar0832_MODE_1632X1224] = mode_1632X1224_8141,
+ [ar0832_MODE_800X600] = mode_800X600_8141,
};
static inline void ar0832_msleep(u32 t)
@@ -1069,6 +1771,7 @@ static int ar0832_set_mode(struct ar0832_dev *dev,
int ret;
struct i2c_client *i2c_client = dev->i2c_client;
struct ar0832_reg reg_frame_length, reg_coarse_time;
+ struct ar0832_reg *mode_seq;
dev_info(&i2c_client->dev, "%s: ++\n", __func__);
@@ -1089,13 +1792,17 @@ static int ar0832_set_mode(struct ar0832_dev *dev,
return -EINVAL;
}
+ if (dev->sensor_id_data == AR0832_SENSOR_ID_8141)
+ mode_seq = mode_table_8141[sensor_mode];
+ else
+ mode_seq = mode_table_8140[sensor_mode];
/* get a list of override regs for the asking frame length, */
/* coarse integration time, and gain.*/
err = ar0832_write_table(dev, mode_start, NULL, 0);
if (err)
return err;
- err = ar0832_write_table(dev, mode_table[sensor_mode], NULL, 0);
+ err = ar0832_write_table(dev, mode_seq, NULL, 0);
if (err)
return err;
@@ -1158,45 +1865,7 @@ static int ar0832_set_region(struct ar0832_dev *dev,
return -1;
dev_dbg(&i2c_client->dev, "%s: width = %d height = %d\n",
__func__, image_width, image_height);
-#if 0
- ar0832_write_reg(i2c_client, 0x0104, 1);
- ar0832_write_reg(i2c_client, 0x0346,
- UpperByte16to8(region->image_start.y));
- /* Y_ADDR START LOWER BYTE */
- ar0832_write_reg(i2c_client, 0x0347,
- LowerByte16to8(region->image_start.y));
- /* Y_OUT SIZE UPPER BYTE */
- ar0832_write_reg(i2c_client, 0x034E,
- UpperByte16to8(DefaultImageHeight));
- /* Y_OUT SIZE LOWER BYTE */
- ar0832_write_reg(i2c_client, 0x034F,
- LowerByte16to8(DefaultImageHeight));
- /* Y_ADDR_END UPPER BYTE */
- ar0832_write_reg(i2c_client, 0x034A,
- UpperByte16to8(region->image_end.y));
- /* Y_ADDR_END LOWER BYTE */
- ar0832_write_reg(i2c_client, 0x034B,
- LowerByte16to8(region->image_end.y));
- /* X_ADDR_START UPPER BYTE */
- ar0832_write_reg(i2c_client, 0x0344,
- UpperByte16to8(region->image_start.x));
- /* X_ADDR START LOWER BYTE */
- ar0832_write_reg(i2c_client, 0x0345,
- LowerByte16to8(region->image_start.x));
- /* X_SIZE UPPER BYTE */
- ar0832_write_reg(i2c_client, 0x034C,
- UpperByte16to8(DefaultImageWidth));
- /* X_SIZE LOWER BYTE */
- ar0832_write_reg(i2c_client, 0x034D,
- LowerByte16to8(DefaultImageWidth));
- /* X_ADDR_END UPPER BYTE */
- ar0832_write_reg(i2c_client, 0x0348,
- UpperByte16to8(region->image_end.x));
- /* X_ADDR_END LOWER BYTE */
- ar0832_write_reg(i2c_client, 0x0349,
- LowerByte16to8(region->image_end.x));
- ar0832_write_reg(i2c_client, 0x0104, 0);
-#endif
+
return 0;
}
@@ -1255,7 +1924,11 @@ static int ar0832_power_on(struct ar0832_dev *dev)
}
/* Board specific power-on sequence */
- dev->pdata->power_on(dev->is_stereo);
+ mutex_lock(&dev->brd_power_lock);
+ if (dev->brd_power_cnt == 0)
+ dev->pdata->power_on(dev->is_stereo);
+ dev->brd_power_cnt++;
+ mutex_unlock(&dev->brd_power_lock);
/* Change slave address */
if (i2c_client->addr)
@@ -1273,6 +1946,27 @@ fail_regulator_1v8_reg:
return ret;
}
+static void ar0832_power_off(struct ar0832_dev *dev)
+{
+ /* Unplug 1.8V and 2.8V power from sensor */
+ if (dev->power_rail.sen_2v8_reg)
+ regulator_disable(dev->power_rail.sen_2v8_reg);
+ if (dev->power_rail.sen_1v8_reg)
+ regulator_disable(dev->power_rail.sen_1v8_reg);
+
+ /* Board specific power-down sequence */
+ mutex_lock(&dev->brd_power_lock);
+ if (WARN(dev->brd_power_cnt <= 0, "unbalanced %s\n", __func__))
+ goto ar0832_pwdn_exit;
+
+ if (dev->brd_power_cnt == 1)
+ dev->pdata->power_off(dev->is_stereo);
+ dev->brd_power_cnt--;
+
+ar0832_pwdn_exit:
+ mutex_unlock(&dev->brd_power_lock);
+}
+
static int ar0832_focuser_set_config(struct ar0832_dev *dev)
{
struct ar0832_reg reg_vcm_ctrl, reg_vcm_step_time;
@@ -1314,6 +2008,25 @@ static int ar0832_focuser_set_position(struct ar0832_dev *dev,
return ret;
}
+static inline
+int ar0832_get_sensorid(struct ar0832_dev *dev, u16 *sensor_id)
+{
+ int ret;
+ struct i2c_client *i2c_client = dev->i2c_client;
+
+ ret = ar0832_power_on(dev);
+ if (ret)
+ return ret;
+
+ ret = ar0832_read_reg16(i2c_client, AR0832_SENSORID_REG, sensor_id);
+ dev_dbg(&i2c_client->dev,
+ "%s: sensor_id - %04x\n", __func__, *sensor_id);
+
+ ar0832_power_off(dev);
+
+ return ret;
+}
+
static long ar0832_ioctl(struct file *file,
unsigned int cmd, unsigned long arg)
{
@@ -1423,6 +2136,30 @@ static long ar0832_ioctl(struct file *file,
mutex_unlock(&dev->ar0832_camera_lock);
return err;
+ case AR0832_IOCTL_GET_SENSOR_ID:
+ dev_dbg(&i2c_client->dev,
+ "%s AR0832_IOCTL_GET_SENSOR_ID\n", __func__);
+
+ if (!dev->sensor_id_valid) {
+ err = ar0832_get_sensorid(dev, &dev->sensor_id_data);
+ if (err) {
+ dev_err(&i2c_client->dev,
+ "%s: failed to get sensor id\n",
+ __func__);
+ }
+ dev->sensor_id_valid = 1;
+ }
+
+ if (copy_to_user((void __user *) arg,
+ &dev->sensor_id_data,
+ sizeof(dev->sensor_id_data))) {
+ dev_err(&i2c_client->dev,
+ "%s: AR0832_IOCTL_GET_SENSOR_ID failed\n",
+ __func__);
+ return -EFAULT;
+ }
+ return 0;
+
default:
dev_err(&i2c_client->dev, "(error) %s NONE IOCTL\n",
__func__);
@@ -1443,6 +2180,7 @@ static int ar0832_open(struct inode *inode, struct file *file)
dev->focuser_info->focuser_init_flag = false;
file->private_data = dev;
+
return 0;
}
@@ -1453,14 +2191,7 @@ static int ar0832_release(struct inode *inode, struct file *file)
dev_info(&i2c_client->dev, "%s: ++\n", __func__);
- /* Unplug 1.8V and 2.8V power from sensor */
- if (dev->power_rail.sen_2v8_reg)
- regulator_disable(dev->power_rail.sen_2v8_reg);
- if (dev->power_rail.sen_1v8_reg)
- regulator_disable(dev->power_rail.sen_1v8_reg);
-
- /* Board specific power-down sequence */
- dev->pdata->power_off(dev->is_stereo);
+ ar0832_power_off(dev);
file->private_data = NULL;
@@ -1524,6 +2255,7 @@ static int ar0832_probe(struct i2c_client *client,
i2c_set_clientdata(client, dev);
mutex_init(&dev->ar0832_camera_lock);
+ mutex_init(&dev->brd_power_lock);
dev->power_rail.sen_1v8_reg = regulator_get(&client->dev, "vdd");
if (IS_ERR_OR_NULL(dev->power_rail.sen_1v8_reg)) {
diff --git a/include/media/ar0832_main.h b/include/media/ar0832_main.h
index 6cf45585fd1d..f5e3713b46fb 100644
--- a/include/media/ar0832_main.h
+++ b/include/media/ar0832_main.h
@@ -26,6 +26,11 @@
#define AR0832_FOCUSER_IOCTL_GET_CONFIG _IOR('o', 0x10, struct ar0832_focuser_config)
#define AR0832_FOCUSER_IOCTL_SET_POSITION _IOW('o', 0x11, __u32)
+#define AR0832_IOCTL_GET_SENSOR_ID _IOR('o', 0x12, __u16)
+
+#define AR0832_SENSOR_ID_8141 0x1006
+#define AR0832_SENSOR_ID_8140 0x3006
+
enum ar0832_test_pattern {
TEST_PATTERN_NONE,
TEST_PATTERN_COLORBARS,