diff options
| author | Jin Park <jinyoungp@nvidia.com> | 2011-10-10 17:42:17 +0900 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2011-10-11 07:11:10 -0700 |
| commit | 3ea4ea8a5594cb8b5781bfd06816993b0a3e90cf (patch) | |
| tree | 717abb20f3017a5006fadc315220a385111c86d8 | |
| parent | b685f87ea655919e0bf0efb3a1bdddf5d1a3abbb (diff) | |
arm: tegra: cardhu: pm298: Correct min_uV for SD1 power rail
Previously it is configured SD1 min_uV to 1.05V to avoid voltage
under-shooting issue on SD1 power rail.
But it doesn't need after safe voltage scaling step patch for
max77663 regulator driver.
Change-Id: I7e5380e0987a39dc9207235137d7e313f5ea077a
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/56962
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/board-cardhu-pm298-power-rails.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/board-cardhu-pm298-power-rails.c b/arch/arm/mach-tegra/board-cardhu-pm298-power-rails.c index 5cc96179fdc0..343c965b7b43 100644 --- a/arch/arm/mach-tegra/board-cardhu-pm298-power-rails.c +++ b/arch/arm/mach-tegra/board-cardhu-pm298-power-rails.c @@ -200,9 +200,7 @@ static struct max77663_regulator_fps_cfg max77663_fps_cfgs[] = { MAX77663_PDATA_INIT(sd0, 600000, 3387500, NULL, 1, 0, 0, 0, 0, -1, FPS_SRC_NONE, -1, -1, EN2_CTRL_SD0 | SD_FSRADE_DISABLE); -/* FIXME: MAX77663 Rev.3 has voltage undershooting issue when voltage scaling. - * To prevent system hang, SD1 min_uV was configured to 1050000. */ -MAX77663_PDATA_INIT(sd1, 1050000, 1587500, NULL, 1, 0, 0, +MAX77663_PDATA_INIT(sd1, 800000, 1587500, NULL, 1, 0, 0, 1, 1, -1, FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE); MAX77663_PDATA_INIT(sd2, 600000, 3387500, NULL, 1, 0, 0, |