summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorLaxman Dewangan <ldewangan@nvidia.com>2011-03-31 21:38:45 +0530
committerVarun Colbert <vcolbert@nvidia.com>2011-04-01 19:25:28 -0700
commit3232571484990077caf807d389a5ca002e14920f (patch)
tree84b17fdf67685e6c45b67a992040d8dc052ed048
parent9ad116ef0413ec32eb75af546c3cdcb7fc15d7a8 (diff)
arm: tegra: clock: Fixing valid range of 16bit divisor
Fixing the possible upper range for the 16bit clock source divisor. Change-Id: Iae5f06b6ce2cbb9c1693963da1b033cfd330c788 Reviewed-on: http://git-master/r/24947 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/tegra2_clocks.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index 21c0bb4ec15b..a72f346d0797 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -214,7 +214,7 @@ static int clk_div16_get_divider(unsigned long parent_rate, unsigned long rate)
if (divider_u16 - 1 < 0)
return 0;
- if (divider_u16 - 1 > 255)
+ if (divider_u16 - 1 > 0xFFFF)
return -EINVAL;
return divider_u16 - 1;