[ventana/usb] turn off vbus

Pull up/down the gpio for vbus when entering or exiting out of
suspend/resume.

Bug 718123

(cherry picked from commit 65f04654231877fdf29d766f73f4e60a251fd975)

Change-Id: I9653dd0241b859da5faf19755b2f8f3e494d3beb
Change-Id: I39f07bdd12a6c9c7038b0a9d4d7318f85664fc53
Reviewed-on: http://git-master/r/9008
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

4 files changed, 61 insertions, 0 deletions

diff --git a/arch/arm/mach-tegra/nvddk/nvddk_usbphy.c b/arch/arm/mach-tegra/nvddk/nvddk_usbphy.c
index 733c2787c630..b5f891447bec 100644
--- a/arch/arm/mach-tegra/nvddk/nvddk_usbphy.c
+++ b/arch/arm/mach-tegra/nvddk/nvddk_usbphy.c
@@ -99,6 +99,34 @@ static void UsbPrivEnableVbus(NvDdkUsbPhy *pUsbPhy, NvBool Enable)
                             pConnectivity->AddressList[i].Address, ODM_VOLTAGE_OFF, NULL);
                 }
             }
+            else if (pConnectivity->AddressList[i].Interface == NvOdmIoModule_Gpio)
+            {
+                if ((!pUsbPhy->hGpio))
+                {
+                    pUsbPhy->hGpio = (NvOdmServicesGpioHandle)NvOdmGpioOpen();
+                    if (!pUsbPhy->hGpio)
+                    {
+                        return;
+                    }
+                }
+                if (!pUsbPhy->hPin)
+                {
+                    NvU32 GpioPort = 0, GpioPin = 0;
+                    GpioPort = pConnectivity->AddressList[0].Instance;
+                    GpioPin = pConnectivity->AddressList[0].Address;
+                    pUsbPhy->hPin = NvOdmGpioAcquirePinHandle(pUsbPhy->hGpio, GpioPort, GpioPin);
+                    if (!pUsbPhy->hPin)
+                    {
+                        NvOdmGpioClose(pUsbPhy->hGpio);
+                        return;
+                    }
+                }
+                NvOdmGpioConfig(pUsbPhy->hGpio, pUsbPhy->hPin, NvOdmGpioPinMode_Output);
+                if (!Enable)
+                    NvOdmGpioSetState(pUsbPhy->hGpio, pUsbPhy->hPin, 0);
+                else
+                    NvOdmGpioSetState(pUsbPhy->hGpio, pUsbPhy->hPin, 1);
+            }
         }
     }
 }
@@ -616,6 +644,17 @@ NvDdkUsbPhyClose(
 
     NvOdmEnableUsbPhyPowerRail(NV_FALSE);
 
+    if (hUsbPhy->hGpio)
+    {
+        if (hUsbPhy->hPin)
+        {
+            NvOdmGpioReleasePinHandle(hUsbPhy->hGpio, hUsbPhy->hPin);
+            hUsbPhy->hPin = NULL;
+        }
+        NvOdmGpioClose(hUsbPhy->hGpio);
+        hUsbPhy->hGpio = NULL;
+    }
+
     NvRmPhysicalMemUnmap(
         (void*)hUsbPhy->UsbVirAdr, hUsbPhy->UsbBankSize);
 
diff --git a/arch/arm/mach-tegra/nvddk/nvddk_usbphy_priv.h b/arch/arm/mach-tegra/nvddk/nvddk_usbphy_priv.h
index 3ed53a20dfb4..326c88a46720 100644
--- a/arch/arm/mach-tegra/nvddk/nvddk_usbphy_priv.h
+++ b/arch/arm/mach-tegra/nvddk/nvddk_usbphy_priv.h
@@ -49,6 +49,8 @@
 #include "nvrm_power.h"
 #include "nvassert.h"
 #include "nvrm_memmgr.h"
+#include "nvodm_query_gpio.h"
+#include "nvrm_gpio.h"
 
 #if defined(__cplusplus)
 extern "C"
@@ -178,6 +180,10 @@ typedef struct NvDdkUsbPhyRec
     NvBool TurnOffPowerRail;
     // Indicates phy powered up for the host mode
     NvBool IsHostMode;
+    // Handle to the GPIO
+    NvOdmServicesGpioHandle hGpio;
+    // Handle to the Pin
+    NvOdmGpioPinHandle hPin;
     // Set of function pointers to access the usb phy hardware interface.
     // Pointer to the h/w specific PowerUp function.
     NvError (*PowerUp)(NvDdkUsbPhyHandle hUsbPhy);
diff --git a/arch/arm/mach-tegra/odm_kit/query/ventana/subboards/nvodm_query_discovery_pm275_addresses.h b/arch/arm/mach-tegra/odm_kit/query/ventana/subboards/nvodm_query_discovery_pm275_addresses.h
index d658ba9f3fd5..e11dc6d60f08 100755..100644
--- a/arch/arm/mach-tegra/odm_kit/query/ventana/subboards/nvodm_query_discovery_pm275_addresses.h
+++ b/arch/arm/mach-tegra/odm_kit/query/ventana/subboards/nvodm_query_discovery_pm275_addresses.h
@@ -393,3 +393,9 @@ static const NvOdmIoAddress s_AcceleroAddresses[] =
     { NvOdmIoModule_Gpio, (NvU32)'n'-'a', 0x04, 0 }, /* Gpio port N and Pin 4 */
 };
 
+// USB3 VBus voltage rail
+static const NvOdmIoAddress s_ffaVddUsb3VBusAddresses[] =
+{
+    { NvOdmIoModule_Gpio, (NvU32)'d'-'a', 0x03, 0 }, /* Gpio port D and Pin 3 */
+};
+
diff --git a/arch/arm/mach-tegra/odm_kit/query/ventana/subboards/nvodm_query_discovery_pm275_peripherals.h b/arch/arm/mach-tegra/odm_kit/query/ventana/subboards/nvodm_query_discovery_pm275_peripherals.h
index b963c7df8a45..36023b424d77 100755..100644
--- a/arch/arm/mach-tegra/odm_kit/query/ventana/subboards/nvodm_query_discovery_pm275_peripherals.h
+++ b/arch/arm/mach-tegra/odm_kit/query/ventana/subboards/nvodm_query_discovery_pm275_peripherals.h
@@ -448,4 +448,14 @@
     NV_ARRAY_SIZE(s_AcceleroAddresses),
     NvOdmPeripheralClass_Other,
 },
+
+//  VBUS for USB3
+{
+    NV_VDD_USB3_VBUS_ODM_ID,
+    s_ffaVddUsb3VBusAddresses,
+    NV_ARRAY_SIZE(s_ffaVddUsb3VBusAddresses),
+    NvOdmPeripheralClass_Other
+},
+
+
 // NOTE: This list *must* end with a trailing comma.