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authorLaxman Dewangan <ldewangan@nvidia.com>2010-08-04 11:36:08 +0530
committerGary King <gking@nvidia.com>2010-08-04 08:51:22 -0700
commit25a04a4278106ad5925795a7dc855e7335a18ceb (patch)
treefb627df821ac50c258c5b90e27bbe2a55793e2b5
parent28e16c0b27d120ae789ece0f4ddd84f54e05828d (diff)
[arm/tegra] serial: write accessor should not add read ops.
The write accessor function uart_writeb() and uart_writel() is doing the read of the same address on which it is writing the data. This is causing unnecessarily read of rx fifo and so causing data loss in rx path if tx fifo is getting written by cpu. This is happening becasue of rx fifo and tx fifo address are same. Change-Id: I194363872d0fd251ddd15a40f42e58acd5ccc7a1 Reviewed-on: http://git-master/r/4746 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Venkata (Muni) Anda <vanda@nvidia.com> Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com> Reviewed-by: Anantha Idapalapati <aidapalapati@nvidia.com> Tested-by: Anantha Idapalapati <aidapalapati@nvidia.com> Reviewed-by: Gary King <gking@nvidia.com>
-rwxr-xr-xdrivers/serial/tegra_hsuart.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/serial/tegra_hsuart.c b/drivers/serial/tegra_hsuart.c
index 5db6096da828..2c83447f6b89 100755
--- a/drivers/serial/tegra_hsuart.c
+++ b/drivers/serial/tegra_hsuart.c
@@ -129,20 +129,20 @@ static inline u8 uart_readb(struct tegra_uart_port *t, unsigned long reg)
return val;
}
-static inline u8 uart_writeb(struct tegra_uart_port *t, u8 val,
+static inline void uart_writeb(struct tegra_uart_port *t, u8 val,
unsigned long reg)
{
dev_vdbg(t->uport.dev, "%s: %p %03lx %02x\n",
__func__, t->uport.membase, reg << t->uport.regshift, val);
- return writeb(val, t->uport.membase + (reg << t->uport.regshift));
+ writeb(val, t->uport.membase + (reg << t->uport.regshift));
}
-static inline u8 uart_writel(struct tegra_uart_port *t, u32 val,
+static inline void uart_writel(struct tegra_uart_port *t, u32 val,
unsigned long reg)
{
dev_vdbg(t->uport.dev, "%s: %p %03lx %08x\n",
__func__, t->uport.membase, reg << t->uport.regshift, val);
- return writel(val, t->uport.membase + (reg << t->uport.regshift));
+ writel(val, t->uport.membase + (reg << t->uport.regshift));
}
static void tegra_set_baudrate(struct tegra_uart_port *t, unsigned int baud);