diff options
| author | licheng <licheng@nvidia.com> | 2011-07-08 13:17:11 -0500 |
|---|---|---|
| committer | Cheryl Jones <chjones@nvidia.com> | 2011-10-05 15:30:58 -0700 |
| commit | 268f5fa89aac00155847c1400f5b2cbea8e19fe2 (patch) | |
| tree | e7f7536019961dce79f083d47cd9530331572cf3 | |
| parent | a36203b0493272a2304d6f6f6a4e44f8e316548b (diff) | |
kernel: Fix the issue of counters not being reset
EMC state control register is not programmed correctly as the value
is not reset after previous write is done.
Bug 829087
Reviewed-on: http://git-master/r/40230
(cherry picked from commit 51a190b49a347968c22c1ed8187568a7ed1fb1f1)
Change-Id: Ie118594bad708cc1169b818452fdb8419e936036
Reviewed-on: http://git-master/r/55954
Reviewed-by: Liang Cheng (SW) <licheng@nvidia.com>
Tested-by: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/tegra2_mc.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra2_mc.c b/arch/arm/mach-tegra/tegra2_mc.c index e565b4b10082..0c4c16c938b9 100644 --- a/arch/arm/mach-tegra/tegra2_mc.c +++ b/arch/arm/mach-tegra/tegra2_mc.c @@ -701,6 +701,7 @@ void emc_stat_start(tegra_mc_counter_t *llp_counter, writel(0xFFFFFFFF, emc.mmio + EMC_STAT_DRAM_CLOCK_LIMIT_LO_0); writel(0xFF, emc.mmio + EMC_STAT_DRAM_CLOCK_LIMIT_HI_0); + llmc_stat = 0; /* Reset then enable statistics */ llmc_stat |= (EMC_STAT_CONTROL_0_LLMC_GATHER_CLEAR << EMC_STAT_CONTROL_0_LLMC_GATHER_SHIFT); @@ -708,6 +709,7 @@ void emc_stat_start(tegra_mc_counter_t *llp_counter, EMC_STAT_CONTROL_0_DRAM_GATHER_SHIFT); writel(llmc_stat, emc.mmio + EMC_STAT_CONTROL_0); + llmc_stat = 0; llmc_stat |= (EMC_STAT_CONTROL_0_LLMC_GATHER_ENABLE << EMC_STAT_CONTROL_0_LLMC_GATHER_SHIFT); llmc_stat |= (EMC_STAT_CONTROL_0_DRAM_GATHER_ENABLE << |