diff options
| author | Robin Gong <b38343@freescale.com> | 2013-09-12 16:22:26 +0800 |
|---|---|---|
| committer | Robin Gong <b38343@freescale.com> | 2013-09-12 18:23:38 +0800 |
| commit | aaba72937410b795cb952eafc4549903cbb45ca5 (patch) | |
| tree | e8f59e03e102717cadfcda769f6a85b0bde37026 | |
| parent | 48a3a338f1e30774a43a6c9fb4e50e3f3edc70a6 (diff) | |
ENGR00279402-1 ARM: dts: imx6: add wdog reset source seclect in dts
Some boards use another WDOG reset source to reboot system in ldo-bypass mode.
We need add the property in board dts file so that we can easily know the
WDOG reset source currently.
For Sabresd, WDOG1 for ldo-enable mode(WDOG event), WDOG2 for ldo-bypass mode
(reset external pmic to trigger POR event).
For sl-evk board, there is no WDOG pin connected with external pmic as Sabresd
, because mx6sl boot at 400Mhz. Then both ldo-enable and ldo-bypass mode use
the common WDOG1 as reset source.
Signed-off-by: Robin Gong <b38343@freescale.com>
| -rw-r--r-- | arch/arm/boot/dts/imx6dl-sabresd-ldo.dts | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6q-sabresd-ldo.dts | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6sl-evk-ldo.dts | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6sl-evk.dts | 1 |
5 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6dl-sabresd-ldo.dts b/arch/arm/boot/dts/imx6dl-sabresd-ldo.dts index 014a72172274..2b5d869421b3 100644 --- a/arch/arm/boot/dts/imx6dl-sabresd-ldo.dts +++ b/arch/arm/boot/dts/imx6dl-sabresd-ldo.dts @@ -16,6 +16,7 @@ &gpc { fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */ + fsl,wdog-reset = <1>; /* watchdog select of reset source */ pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ }; diff --git a/arch/arm/boot/dts/imx6q-sabresd-ldo.dts b/arch/arm/boot/dts/imx6q-sabresd-ldo.dts index c0a271bf3db9..e2744f29d8c2 100644 --- a/arch/arm/boot/dts/imx6q-sabresd-ldo.dts +++ b/arch/arm/boot/dts/imx6q-sabresd-ldo.dts @@ -21,6 +21,7 @@ &gpc { fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */ + fsl,wdog-reset = <1>; /* watchdog select of reset source */ pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ }; diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index 1b50cdc9d435..b4965304eea0 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi @@ -267,6 +267,7 @@ fsl,cpu_pdnscr_iso2sw = <0x1>; fsl,cpu_pdnscr_iso = <0x1>; fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */ + fsl,wdog-reset = <2>; /* watchdog select of reset source */ pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ }; @@ -577,6 +578,7 @@ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 + MX6QDL_PAD_GPIO_1__WDOG2_B 0x80000000 >; }; }; diff --git a/arch/arm/boot/dts/imx6sl-evk-ldo.dts b/arch/arm/boot/dts/imx6sl-evk-ldo.dts index 3a6818106cf1..9bbd6fbbfa97 100644 --- a/arch/arm/boot/dts/imx6sl-evk-ldo.dts +++ b/arch/arm/boot/dts/imx6sl-evk-ldo.dts @@ -16,6 +16,7 @@ &gpc { fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */ + fsl,wdog-reset = <1>; /* watchdog select of reset source */ pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ }; diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts index 0095c6fc737d..3ed918fc390a 100644 --- a/arch/arm/boot/dts/imx6sl-evk.dts +++ b/arch/arm/boot/dts/imx6sl-evk.dts @@ -167,6 +167,7 @@ fsl,cpu_pdnscr_iso2sw = <0x1>; fsl,cpu_pdnscr_iso = <0x1>; fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */ + fsl,wdog-reset = <1>; /* watchdog select of reset source */ pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ }; |