diff options
author | Bai Ping <b51503@freescale.com> | 2014-12-15 23:56:09 +0800 |
---|---|---|
committer | Jason Liu <r64343@freescale.com> | 2014-12-17 10:34:24 +0800 |
commit | f4743d4ab749afd7f08fa4fc98e7bf59c3eda2e0 (patch) | |
tree | 7ddc655de5791fc8ed334b5840c8b0dc59636809 | |
parent | 3141bfc97e667de4b3d88968aa18668699d735ea (diff) |
MLK-9996 arm: imx6: Correct the AHB clock in low_bus_freq_mode
When the busfreq is in audio_bus_freq_mode, the AHB bus is at 8MHz,
in low_bus_freq_mode, the AHB needs to run at 24MHz. So when switching
from audio_bus_freq_mode to low_bus_freq_mode, make sure the AHB is at
24MHz in low_bus_freq_mode.
Signed-off-by: Bai Ping <b51503@freescale.com>
-rw-r--r-- | arch/arm/mach-imx/busfreq-imx6.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/busfreq-imx6.c b/arch/arm/mach-imx/busfreq-imx6.c index 9a02659ce6f3..9a8fcc53a5b2 100644 --- a/arch/arm/mach-imx/busfreq-imx6.c +++ b/arch/arm/mach-imx/busfreq-imx6.c @@ -280,6 +280,12 @@ static void enter_lpm_imx6sl(void) } else { if (!ultra_low_bus_freq_mode && !low_bus_freq_mode) { /* + * Anyway, make sure the AHB is running at 24MHz + * in low_bus_freq_mode. + */ + if (audio_bus_freq_mode) + imx_clk_set_rate(ahb_clk, LPAPM_CLK); + /* * Set DDR to 24MHz. * Since we are going to bypass PLL2, * we need to move ARM clk off PLL2_PFD2 |