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authorRobin Gong <b38343@freescale.com>2014-12-17 19:33:11 +0800
committerRobin Gong <b38343@freescale.com>2014-12-19 10:24:30 +0800
commit9b85071287145bf16e8202c2be4fdf7a076f7f0d (patch)
tree2119c509a3fc71524bc7a7fcce8c043d8b15620e
parentef2d77d12455d2d0c544a10df3f8fd16e7accfeb (diff)
MLK-9891: ARM: dts: imx6sx-sabreauto: use WDOG_B pin to reset whole board
For the QSPI byte address not aligned in ROM code and kernel, we have to reset power cycle to workaroud this issue. Use WDOG_B pin to trigger PWRON of pfuze. Signed-off-by: Robin Gong <b38343@freescale.com> (cherry picked from commit 86f82eadc612a746ab57760f78754e0619aa48b1)
-rw-r--r--arch/arm/boot/dts/imx6sx-sabreauto.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts
index ea3457e41a50..2de781536ede 100644
--- a/arch/arm/boot/dts/imx6sx-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts
@@ -209,6 +209,7 @@
MX6SX_PAD_LCD1_DATA23__GPIO3_IO_24 0x80000000
MX6SX_PAD_SD2_CLK__GPIO6_IO_6 0x80000000
MX6SX_PAD_LCD1_DATA22__GPIO3_IO_23 0x80000000
+ MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x10b0
>;
};
};