diff options
| author | Richard Zhu <r65037@freescale.com> | 2014-08-01 19:40:03 +0800 |
|---|---|---|
| committer | Richard Zhu <r65037@freescale.com> | 2014-08-06 10:51:56 +0800 |
| commit | c8a6b97fa238d4cd79ae90c721c9e77eec05f71c (patch) | |
| tree | 9d91d3658d108ea5899695dfdbab63adc1d8d0d5 | |
| parent | ea837f36ea7e0074efa13244674bf71a73885124 (diff) | |
ENGR00325494 pcie:delay is requried after clks_en
- the async reset input need ref clock to sync internally,
when the ref clock comes after reset, internal synced reset
time is too short , cannot meet the requirement
so, ssp_en should be asserted at least 4us after ref clock stable.
- align to the community imx pcie driver, add the about
200us delay to make sure that it can allow the pcie clks
stabilize, when pcie clks are enabled on imx6q/dl/solo.
Signed-off-by: Richard Zhu <r65037@freescale.com>
(cherry picked from commit 5d9635c8d92b21bc12753517fa3e9884417b19be)
| -rw-r--r-- | drivers/pci/host/pci-imx6.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c index ed991a22020b..1ecc542037f9 100644 --- a/drivers/pci/host/pci-imx6.c +++ b/drivers/pci/host/pci-imx6.c @@ -334,6 +334,9 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp) IMX6Q_GPR1_PCIE_REF_CLK_EN, 1 << 16); } + /* allow the clocks to stabilize */ + usleep_range(200, 500); + if (gpio_is_valid(imx6_pcie->reset_gpio)) { gpio_set_value(imx6_pcie->reset_gpio, 0); mdelay(1); |