diff options
| author | Ranjani Vaidyanathan <ra5478@freescale.com> | 2013-12-03 11:40:52 -0800 |
|---|---|---|
| committer | Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com> | 2013-12-05 13:12:36 -0800 |
| commit | 6cebd8c3ce73d30a482d3b943a965e4f4794eeda (patch) | |
| tree | a70a3a724ac710c1673e4be1eb0158fbe3b9431e | |
| parent | 743cc06624eb2d6a123c3db704e22a5453c85fe6 (diff) | |
ENGR00290601 [iMX6x] Ensure PLL is powered down when bypass rate is requested.
Ensure that PLL is powered down when bypass rate is requested and
power it up when some other rate is requested.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
| -rw-r--r-- | arch/arm/mach-imx/clk-pllv3.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/clk-pllv3.c b/arch/arm/mach-imx/clk-pllv3.c index f187052d639d..b73756eec5b7 100644 --- a/arch/arm/mach-imx/clk-pllv3.c +++ b/arch/arm/mach-imx/clk-pllv3.c @@ -172,10 +172,11 @@ static int clk_pllv3_set_rate(struct clk_hw *hw, unsigned long rate, if (rate == BYPASS_RATE) { /* Set the bypass bit. */ val |= BM_PLL_BYPASS; + /* Power down the PLL. */ if (pll->powerup_set) - val |= BM_PLL_POWER; - else val &= ~BM_PLL_POWER; + else + val |= BM_PLL_POWER; writel_relaxed(val, pll->base); return 0; |