diff options
| author | Luwei Zhou <b45643@freescale.com> | 2013-12-10 14:21:15 +0800 |
|---|---|---|
| committer | Luwei Zhou <b45643@freescale.com> | 2013-12-12 15:44:36 +0800 |
| commit | 1072f9f98e4d4da0d2fc643e65a527876f703cd2 (patch) | |
| tree | 3f78459b6b0beac4dd094574fa6f699923d52616 | |
| parent | 98e62d0bf4cbea3e058aa02b47690f100d90820b (diff) | |
ENGR00290679 mxc: mlb Fix the MLB150 not stable issue in ISOC mode.
The MLB test bench has bug when testing the ISOC mode.When we press
stop test button when completing test, MITB will cause MLB150 on ARD
error.The mlbintr ISR handler is used to handle the error interrupt.
In the ISR handler, the MLB150_MS0,MLB150MS1 should be cleared.
The spec doesn't give detailed description. The spec only says that
the registers need to be cleared before enabling interrupt.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
(cherry picked from commit 567ec335491372932e13c848eb460e75eec403cb)
| -rwxr-xr-x | drivers/mxc/mlb/mxc_mlb150.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/mxc/mlb/mxc_mlb150.c b/drivers/mxc/mlb/mxc_mlb150.c index fe0239a8df0c..d1bae055a4fa 100755 --- a/drivers/mxc/mlb/mxc_mlb150.c +++ b/drivers/mxc/mlb/mxc_mlb150.c @@ -1783,6 +1783,15 @@ static irqreturn_t mlb_isr(int irq, void *dev_id) */ ms0 = __raw_readl(mlb_base + REG_MS0); ms1 = __raw_readl(mlb_base + REG_MS1); + + /* + * The MLB150_MS0, MLB150_MS1 registers need to be cleared. In + * the spec description, the registers should be cleared when + * enabling interrupt. In fact, we also should clear it in ISR. + */ + __raw_writel(0, mlb_base + REG_MS0); + __raw_writel(0, mlb_base + REG_MS1); + pr_debug("mxc_mlb150: mlb interrupt:0x%08x 0x%08x\n", (u32)ms0, (u32)ms1); |