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authorLily Zhang <r58066@freescale.com>2012-03-13 18:47:50 +0800
committerLily Zhang <r58066@freescale.com>2012-03-22 12:35:44 +0800
commitfcf6363273c09875f45c168295e73c05588c7e98 (patch)
treea3ba58bc7194915d755b3ae7e8f9d5987e811b84
parent62c68488fd5899c3712baa2cdc8b109e4667c982 (diff)
ENGR00177310-1 i.mx6dl sabresd: add camera support
Add camera support into i.mx6dl sabreasd board. Signed-off-by: Lily Zhang <r58066@freescale.com>
-rw-r--r--arch/arm/mach-mx6/board-mx6q_sabresd.c21
1 files changed, 17 insertions, 4 deletions
diff --git a/arch/arm/mach-mx6/board-mx6q_sabresd.c b/arch/arm/mach-mx6/board-mx6q_sabresd.c
index 4df143eac28c..d2c32ab35cfc 100644
--- a/arch/arm/mach-mx6/board-mx6q_sabresd.c
+++ b/arch/arm/mach-mx6/board-mx6q_sabresd.c
@@ -378,7 +378,7 @@ static void mx6q_csi0_io_init(void)
/* Camera reset */
gpio_request(SABRESD_CSI0_RST, "cam-reset");
- gpio_direction_output(SABRESD_MIPICSI_RST, 1);
+ gpio_direction_output(SABRESD_CSI0_RST, 1);
/* Camera power down */
gpio_request(SABRESD_CSI0_PWN, "cam-pwdn");
@@ -386,7 +386,8 @@ static void mx6q_csi0_io_init(void)
msleep(1);
gpio_set_value(SABRESD_CSI0_PWN, 0);
- /* For MX6Q GPR1 bit19 and bit20 meaning:
+ /* For MX6Q:
+ * GPR1 bit19 and bit20 meaning:
* Bit19: 0 - Enable mipi to IPU1 CSI0
* virtual channel is fixed to 0
* 1 - Enable parallel interface to IPU1 CSI0
@@ -397,8 +398,16 @@ static void mx6q_csi0_io_init(void)
* virtual channel is fixed to 1
* IPU2 CSI0 directly connect to mipi csi2,
* virtual channel is fixed to 2
+ *
+ * For MX6DL:
+ * GPR13 bit 0-2 IPU_CSI0_MUX
+ * 000 MIPI_CSI0
+ * 100 IPU CSI0
*/
- mxc_iomux_set_gpr_register(1, 19, 1, 1);
+ if (cpu_is_mx6q())
+ mxc_iomux_set_gpr_register(1, 19, 1, 1);
+ else if (cpu_is_mx6dl())
+ mxc_iomux_set_gpr_register(13, 0, 3, 4);
}
static struct fsl_mxc_camera_platform_data camera_data = {
@@ -435,7 +444,11 @@ static void mx6q_mipi_sensor_io_init(void)
msleep(1);
gpio_set_value(SABRESD_MIPICSI_PWN, 0);
- mxc_iomux_set_gpr_register(1, 19, 1, 0);
+ if (cpu_is_mx6q())
+ mxc_iomux_set_gpr_register(1, 19, 1, 0);
+ if (cpu_is_mx6dl()) {
+ mxc_iomux_set_gpr_register(13, 0, 3, 0);
+ }
}
static struct fsl_mxc_camera_platform_data mipi_csi2_data = {