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authorAnson Huang <b20788@freescale.com>2011-11-14 20:31:30 +0800
committerAnson Huang <b20788@freescale.com>2011-11-15 11:22:21 +0800
commit313e44d806368623bc0302f4611bb038ee4c02f4 (patch)
tree4b2875b02acbef8e2a24c1252d2dabc8d757ba60
parent2d8c06becb880636b2d46c88d23a12eaa0bb4f1e (diff)
ENGR00162115 [WDOG]Should suspend timer in LPM
We should set the WDOG timer to suspend in low power mode, or when system suspend, wdog will continue to run, and reset the system. This WCR_WDZST is a write once-only register. Signed-off-by: Anson Huang <b20788@freescale.com>
-rw-r--r--drivers/watchdog/imx2_wdt.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/watchdog/imx2_wdt.c b/drivers/watchdog/imx2_wdt.c
index 86f7cac1026c..ad2a40fefc6c 100644
--- a/drivers/watchdog/imx2_wdt.c
+++ b/drivers/watchdog/imx2_wdt.c
@@ -41,6 +41,7 @@
#define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
#define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */
#define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */
+#define IMX2_WDT_WCR_WDZST (1 << 0) /* -> Watchdog timer Suspend */
#define IMX2_WDT_WSR 0x02 /* Service Register */
#define IMX2_WDT_SEQ1 0x5555 /* -> service sequence 1 */
@@ -85,6 +86,8 @@ static inline void imx2_wdt_setup(void)
{
u16 val = __raw_readw(imx2_wdt.base + IMX2_WDT_WCR);
+ /* Suspend watch dog timer in low power mode, write once-only */
+ val |= IMX2_WDT_WCR_WDZST;
/* Strip the old watchdog Time-Out value */
val &= ~IMX2_WDT_WCR_WT;
/* Generate reset if WDOG times out */