ENGR00140872 MX50: Add RD3 support

One image for RD1(RDP) and RD3 by adding board_is_rd3 to distinguish them.
The patch covers board changes as follows:
  - FEC_EN pin changed.
  - POWER_EN and DISP_VSYNC pin switched.
  - set UART1_RTS__GPIO_6_9 to enable SD2 VDD
  - DCDC_EN changed

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Robby Cai <R63905@freescale.com>

3 files changed, 69 insertions, 11 deletions

diff --git a/arch/arm/mach-mx5/mx50_rdp.c b/arch/arm/mach-mx5/mx50_rdp.c
index 48b507642497..6a78ac96cb9b 100644
--- a/arch/arm/mach-mx5/mx50_rdp.c
+++ b/arch/arm/mach-mx5/mx50_rdp.c
@@ -100,7 +100,7 @@
 #define EPDC_PMIC_INT		(5*32 + 17)	/*GPIO_6_17 */
 #define EPDC_VCOM	(3*32 + 21)	/*GPIO_4_21 */
 #define EPDC_PWRSTAT	(2*32 + 28)	/*GPIO_3_28 */
-#define ELCDIF_PWR_ON	(1*32 + 21)	/*GPIO_2_21 */
+#define ELCDIF_PWR_ON (board_is_mx50_rd3() ? (1*32 + 18) : (1*32 + 21))
 #define ELCDIF_DAT0_DUMMY	(0*32 + 0)	/*GPIO_1_0 */
 #define ELCDIF_DAT1_DUMMY	(0*32 + 1)	/*GPIO_1_1 */
 #define ELCDIF_DAT2_DUMMY	(0*32 + 2)	/*GPIO_1_2 */
@@ -113,9 +113,11 @@
 #define CSPI_CS2	(3*32 + 11) /*GPIO_4_11*/
 #define SGTL_OSCEN (5*32 + 8) /*GPIO_6_8*/
 #define SGTL_AMP_SHDN		(5*32 + 15) /*GPIO_6_15*/
-#define FEC_EN (5*32 + 23) /*GPIO_6_23*/
+#define FEC_EN (board_is_mx50_rd3() ? (3*32 + 15) : (5*32 + 23))
 #define FEC_RESET_B (3*32 + 12) /*GPIO_4_12*/
 #define USB_OTG_PWR	(5*32 + 25) /*GPIO_6_25*/
+#define DCDC_EN (3*32 + 16) /*GPIO_4_16*/
+#define UART1_RTS (5*32 + 9) /*GPIO_6_9*/
 
 extern int __init mx50_rdp_init_mc13892(void);
 extern struct cpu_wp *(*get_cpu_wp)(int *wp);
@@ -317,6 +319,13 @@ static iomux_v3_cfg_t mx50_rdp[] = {
 	MX50_PAD_EIM_LBA__GPIO_1_26,
 };
 
+/* POWER_EN and DISP_VSYNC pin switched */
+static iomux_v3_cfg_t mx50_rd3_adjust[] = {
+	MX50_PAD_DISP_CS__ELCDIF_HSYNC,
+	MX50_PAD_DISP_BUSY__GPIO_2_18,
+	MX50_PAD_UART1_RTS__GPIO_6_9,	/* SD2 VDD */
+};
+
 static iomux_v3_cfg_t mx50_gpmi_nand[] = {
 	MX50_PIN_EIM_DA8__NANDF_CLE,
 	MX50_PIN_EIM_DA9__NANDF_ALE,
@@ -1203,7 +1212,10 @@ static void wvga_reset(void)
 	mxc_iomux_v3_setup_multiple_pads(rdp_wvga_pads, \
 				ARRAY_SIZE(rdp_wvga_pads));
 
-	gpio_direction_output(FEC_EN, 1);
+	if (board_is_mx50_rd3())
+		gpio_direction_output(FEC_EN, 0);
+	else
+		gpio_direction_output(FEC_EN, 1);
 
 	gpio_request(ELCDIF_DAT0_DUMMY, "elcdif-data0");
 	gpio_direction_output(ELCDIF_DAT0_DUMMY, 0);
@@ -1356,14 +1368,24 @@ static struct gpmi_nfc_platform_data  gpmi_nfc_platform_data = {
 
 static void fec_gpio_iomux_init()
 {
-	iomux_v3_cfg_t iomux_setting = (MX50_PAD_I2C3_SDA__GPIO_6_23 & \
+	iomux_v3_cfg_t iomux_setting;
+
+	if (board_is_mx50_rd3())
+		iomux_setting = (MX50_PAD_ECSPI1_SS0__GPIO_4_15 & \
+				~MUX_PAD_CTRL_MASK) | \
+				MUX_PAD_CTRL(PAD_CTL_PKE | PAD_CTL_DSE_HIGH);
+	else
+		iomux_setting = (MX50_PAD_I2C3_SDA__GPIO_6_23 & \
 				~MUX_PAD_CTRL_MASK) | \
 				MUX_PAD_CTRL(PAD_CTL_PKE | PAD_CTL_DSE_HIGH);
 
 	/* Enable the Pull/keeper */
 	mxc_iomux_v3_setup_pad(iomux_setting);
 	gpio_request(FEC_EN, "fec-en");
-	gpio_direction_output(FEC_EN, 0);
+	if (board_is_mx50_rd3())
+		gpio_direction_output(FEC_EN, 1);
+	else
+		gpio_direction_output(FEC_EN, 0);
 	gpio_request(FEC_RESET_B, "fec-reset_b");
 	gpio_direction_output(FEC_RESET_B, 0);
 	udelay(500);
@@ -1372,7 +1394,13 @@ static void fec_gpio_iomux_init()
 
 static void fec_gpio_iomux_deinit()
 {
-	iomux_v3_cfg_t iomux_setting = (MX50_PAD_I2C3_SDA__GPIO_6_23 & \
+	iomux_v3_cfg_t iomux_setting;
+
+	if (board_is_mx50_rd3())
+		iomux_setting = (MX50_PAD_ECSPI1_SS0__GPIO_4_15 & \
+					~MUX_PAD_CTRL_MASK) | MUX_PAD_CTRL(0x4);
+	else
+		iomux_setting = (MX50_PAD_I2C3_SDA__GPIO_6_23 & \
 					~MUX_PAD_CTRL_MASK) | MUX_PAD_CTRL(0x4);
 
 	mxc_iomux_v3_setup_pad(iomux_setting);
@@ -1386,6 +1414,17 @@ static void mx50_suspend_enter()
 {
 	iomux_v3_cfg_t *p = suspend_enter_pads;
 	int i;
+	iomux_v3_cfg_t iomux_setting =
+			(MX50_PAD_ECSPI2_SCLK__GPIO_4_16 &
+			~MUX_PAD_CTRL_MASK) | MUX_PAD_CTRL(0x84);
+
+	if (board_is_mx50_rd3()) {
+		/* Enable the Pull/keeper */
+		mxc_iomux_v3_setup_pad(iomux_setting);
+		gpio_request(DCDC_EN, "dcdc-en");
+		gpio_direction_output(DCDC_EN, 1);
+	}
+
 	/* Set PADCTRL to 0 for all IOMUX. */
 	for (i = 0; i < ARRAY_SIZE(suspend_enter_pads); i++) {
 		suspend_exit_pads[i] = *p;
@@ -1402,6 +1441,17 @@ static void mx50_suspend_enter()
 
 static void mx50_suspend_exit()
 {
+	iomux_v3_cfg_t iomux_setting =
+			(MX50_PAD_ECSPI2_SCLK__GPIO_4_16 &
+			~MUX_PAD_CTRL_MASK) | MUX_PAD_CTRL(0x84);
+
+	if (board_is_mx50_rd3()) {
+		/* Enable the Pull/keeper */
+		mxc_iomux_v3_setup_pad(iomux_setting);
+		gpio_request(DCDC_EN, "dcdc-en");
+		gpio_direction_output(DCDC_EN, 0);
+	}
+
 	mxc_iomux_v3_setup_multiple_pads(suspend_exit_pads,
 			ARRAY_SIZE(suspend_exit_pads));
 	fec_gpio_iomux_init();
@@ -1452,6 +1502,10 @@ static void __init mx50_rdp_io_init(void)
 	mxc_iomux_v3_setup_multiple_pads(mx50_rdp, \
 			ARRAY_SIZE(mx50_rdp));
 
+	if (board_is_mx50_rd3())
+		mxc_iomux_v3_setup_multiple_pads(mx50_rd3_adjust, \
+			ARRAY_SIZE(mx50_rd3_adjust));
+
 	gpio_request(SD1_WP, "sdhc1-wp");
 	gpio_direction_input(SD1_WP);
 
@@ -1485,6 +1539,11 @@ static void __init mx50_rdp_io_init(void)
 	gpio_request(ELCDIF_PWR_ON, "elcdif-power-on");
 	gpio_direction_output(ELCDIF_PWR_ON, 1);
 
+	if (board_is_mx50_rd3()) {
+		gpio_request(UART1_RTS, "sd2-vdd");
+		gpio_direction_output(UART1_RTS, 1);
+	}
+
 	if (enable_w1) {
 		iomux_v3_cfg_t one_wire = MX50_PAD_OWIRE__OWIRE;
 		mxc_iomux_v3_setup_pad(one_wire);
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index 9b651b1c7cab..93a3781d81ca 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -97,6 +97,7 @@ extern unsigned int system_rev;
 #define board_is_mx53_evk_b()    (cpu_is_mx53() && board_is_rev(BOARD_REV_3))
 #define board_is_mx53_ard_a()    (cpu_is_mx53() && board_is_rev(BOARD_REV_1))
 #define board_is_mx53_ard_b()    (cpu_is_mx53() && board_is_rev(BOARD_REV_2))
+#define board_is_mx50_rd3()	(cpu_is_mx50() && board_is_rev(BOARD_REV_4))
 #endif
 
 #include <mach/mxc.h>
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx50.h b/arch/arm/plat-mxc/include/mach/iomux-mx50.h
index 2314a8dbcbc8..4748681f0c93 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx50.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx50.h
@@ -27,11 +27,9 @@
 					PAD_CTL_DSE_HIGH)
 
 #define MX50_WVGA_PAD_CTRL	(PAD_CTL_PKE | PAD_CTL_DSE_HIGH)
+#define MX50_SD_PAD_CTRL	MX50_SD3_PAD_DAT
 
-#define MX50_SD_PAD_CTRL		(PAD_CTL_PKE | PAD_CTL_DSE_HIGH | \
-					PAD_CTL_PUS_47K_UP | PAD_CTL_SRE_FAST)
-
-#define MX50_SD3_PAD_DAT	(PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
+#define MX50_SD3_PAD_DAT	(PAD_CTL_PKE | PAD_CTL_PUE | \
 					PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_HIGH)
 #define MX50_SD3_PAD_CMD	(PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
 					PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_HIGH)
@@ -454,7 +452,7 @@
 						MX50_ELCDIF_PAD_CTRL)
 #define MX50_PAD_DISP_RS__ELCDIF_VSYNC	IOMUX_PAD(0x434, 0x154, 2, 0x73c, 1, \
 						MX50_ELCDIF_PAD_CTRL)
-#define MX50_PAD_DISP_CS__ELCDIF_HSYNC	IOMUX_PAD(0x438, 0x158, 2, 0x0, 0, \
+#define MX50_PAD_DISP_CS__ELCDIF_HSYNC	IOMUX_PAD(0x438, 0x158, 2, 0x6f8, 1, \
 						MX50_ELCDIF_PAD_CTRL)
 #define MX50_PAD_DISP_RD__ELCDIF_EN	IOMUX_PAD(0x430, 0x150, 2, 0x0, 0, \
 						MX50_ELCDIF_PAD_CTRL)