diff options
| author | Frank Li <Frank.Li@freescale.com> | 2010-07-12 16:17:51 +0800 |
|---|---|---|
| committer | Lily Zhang <r58066@freescale.com> | 2010-07-19 14:46:30 +0800 |
| commit | 0d5ad8a336fc5f5db7045e7a3ebf9824593e8dcf (patch) | |
| tree | 68c80288a1ad7e72b7ec71b16b0631dafa71ab94 | |
| parent | 52f71ae37f35f430cd3bff7771dee370912fc878 (diff) | |
ENGR00125056-1 MX50: add one wire pin configuration
Add "w1" setup at mx50 pin defination because 1wire pin used
for usb over current default.
Fix multi w1_setup problem at many i.MX platform. Only first one
is run by main.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
| -rw-r--r-- | arch/arm/mach-mx5/clock_mx50.c | 3 | ||||
| -rw-r--r-- | arch/arm/mach-mx5/mx50_arm2_gpio.c | 21 | ||||
| -rw-r--r-- | arch/arm/mach-mx5/mx51_babbage_gpio.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-mx5/mx53_evk_gpio.c | 2 |
4 files changed, 25 insertions, 3 deletions
diff --git a/arch/arm/mach-mx5/clock_mx50.c b/arch/arm/mach-mx5/clock_mx50.c index 6e5909633f17..6bd7fd3b96aa 100644 --- a/arch/arm/mach-mx5/clock_mx50.c +++ b/arch/arm/mach-mx5/clock_mx50.c @@ -2181,7 +2181,8 @@ static struct clk rtc_clk = { }; static struct clk owire_clk = { - .name = "owire_clk", + /* 1w driver come from upstream and use owire as clock name*/ + .name = "owire", .parent = &ipg_perclk, .enable = _clk_enable, .enable_reg = MXC_CCM_CCGR2, diff --git a/arch/arm/mach-mx5/mx50_arm2_gpio.c b/arch/arm/mach-mx5/mx50_arm2_gpio.c index 975e8967a877..8b37784ef9b5 100644 --- a/arch/arm/mach-mx5/mx50_arm2_gpio.c +++ b/arch/arm/mach-mx5/mx50_arm2_gpio.c @@ -511,6 +511,15 @@ static struct mxc_iomux_pin_cfg __initdata mxc_iomux_pins[] = { }, }; +static int __initdata enable_w1 = { 0 }; +static int __init w1_setup(char *__unused) +{ + enable_w1 = 1; + return cpu_is_mx50(); +} + +__setup("w1", w1_setup); + void __init mx50_arm2_io_init(void) { int i; @@ -571,6 +580,18 @@ void __init mx50_arm2_io_init(void) /* ELCDIF backlight */ gpio_request(IOMUX_TO_GPIO(MX50_PIN_DISP_BUSY), "gp2_18"); gpio_direction_output(IOMUX_TO_GPIO(MX50_PIN_DISP_BUSY), 1); + + if (enable_w1) { + /* OneWire */ + mxc_request_iomux(MX50_PIN_OWIRE, IOMUX_CONFIG_ALT0); + mxc_iomux_set_pad(MX50_PIN_OWIRE, PAD_CTL_HYS_ENABLE | + PAD_CTL_PKE_ENABLE | + PAD_CTL_ODE_OPENDRAIN_ENABLE | + PAD_CTL_DRV_HIGH | + PAD_CTL_SRE_FAST | + PAD_CTL_100K_PU | + PAD_CTL_PUE_PULL); + } } /* workaround for cspi chipselect pin may not keep correct level when idle */ diff --git a/arch/arm/mach-mx5/mx51_babbage_gpio.c b/arch/arm/mach-mx5/mx51_babbage_gpio.c index aace94dbfdd3..5d484b78832b 100644 --- a/arch/arm/mach-mx5/mx51_babbage_gpio.c +++ b/arch/arm/mach-mx5/mx51_babbage_gpio.c @@ -485,7 +485,7 @@ static int __initdata enable_w1 = { 0 }; static int __init w1_setup(char *__unused) { enable_w1 = 1; - return 1; + return cpu_is_mx51(); } __setup("w1", w1_setup); diff --git a/arch/arm/mach-mx5/mx53_evk_gpio.c b/arch/arm/mach-mx5/mx53_evk_gpio.c index 76094607fecd..caeee73ea414 100644 --- a/arch/arm/mach-mx5/mx53_evk_gpio.c +++ b/arch/arm/mach-mx5/mx53_evk_gpio.c @@ -760,7 +760,7 @@ static int __initdata enable_w1 = { 0 }; static int __init w1_setup(char *__unused) { enable_w1 = 1; - return 1; + return cpu_is_mx53(); } __setup("w1", w1_setup); |