diff options
| author | Robby Cai <R63905@freescale.com> | 2010-07-30 15:27:25 +0800 |
|---|---|---|
| committer | Robby Cai <R63905@freescale.com> | 2010-07-30 19:37:53 +0800 |
| commit | 65d3aa2923cc9482298a22693ad3a8e0a73a3937 (patch) | |
| tree | 052185cd224fb61588714009370473cdc38b5648 | |
| parent | 081f7a7408f71c67f19d95fde9e25f7e611362f3 (diff) | |
ENGR00125752 MX50: Change display_axi clock parent to PFD
Changed display_axi clock parent to PFD
Changed apbh_dma_clk parent to ahb_clk according to h/w design.
Signed-off-by: Robby Cai <R63905@freescale.com>
| -rw-r--r-- | arch/arm/mach-mx5/clock_mx50.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-mx5/clock_mx50.c b/arch/arm/mach-mx5/clock_mx50.c index d76d12c53a39..5f0d862a78ad 100644 --- a/arch/arm/mach-mx5/clock_mx50.c +++ b/arch/arm/mach-mx5/clock_mx50.c @@ -2379,7 +2379,7 @@ static struct clk gpu2d_clk = { static struct clk apbh_dma_clk = { .name = "apbh_dma_clk", - .parent = &pll1_sw_clk, + .parent = &ahb_clk, .enable = _clk_enable, .disable = _clk_disable, .enable_reg = MXC_CCM_CCGR7, @@ -3136,7 +3136,7 @@ int __init mx50_clocks_init(unsigned long ckil, unsigned long osc, unsigned long clk_set_rate(&cspi_main_clk, 12000000); /* set DISPLAY_AXI to 200Mhz */ - clk_set_parent(&display_axi_clk, &pll1_sw_clk); + clk_set_parent(&display_axi_clk, &pfd2_clk); clk_set_rate(&display_axi_clk, 200000000); /* Enable and set EPDC AXI to 200MHz */ |