diff options
author | Aisheng.Dong <b29396@freescale.com> | 2010-08-03 10:11:50 +0800 |
---|---|---|
committer | Aisheng.Dong <b29396@freescale.com> | 2010-08-03 12:41:40 +0800 |
commit | 4d02ec7d20b718568fdd911f68e67c5f9e46576c (patch) | |
tree | 559e61a6e3a36be86a55747b142dd5b412138320 | |
parent | fe08475eb73b7235e092220b5274c69434e7086c (diff) |
ENGR00125823-3 mx35 esdhc: set clock always on according to requirements
Due the ROM code bug, we need to let clock of mx35 esdhc always on
or the HW reset may not work.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
-rw-r--r-- | arch/arm/mach-mx35/mx35_3stack.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-mx35/mx35_3stack.c b/arch/arm/mach-mx35/mx35_3stack.c index 35d639b5a534..868cf12ca2e6 100644 --- a/arch/arm/mach-mx35/mx35_3stack.c +++ b/arch/arm/mach-mx35/mx35_3stack.c @@ -605,6 +605,13 @@ static struct mxc_mmc_platform_data mmc1_data = { #endif .min_clk = 150000, .max_clk = 52000000, + /* Do not disable the eSDHC clk on MX35 3DS board, + * since SYSTEM can't boot up after the reset key + * is pressed when the SD/MMC boot mode is used. + * The root cause is that the ROM code don't ensure + * the SD/MMC clk is running when boot system. + * */ + .clk_always_on = 1, .card_inserted_state = 0, .status = sdhc_get_card_det_status, .wp_status = sdhc_write_protect, @@ -651,6 +658,7 @@ static struct mxc_mmc_platform_data mmc2_data = { .caps = MMC_CAP_4_BIT_DATA, .min_clk = 150000, .max_clk = 50000000, + .clk_always_on = 1, .card_inserted_state = 0, .status = sdhc_get_card_det_status, .wp_status = sdhc_write_protect, |