diff options
| author | Fancy Fang <chen.fang@freescale.com> | 2015-03-20 14:11:52 +0800 |
|---|---|---|
| committer | guoyin.chen <guoyin.chen@freescale.com> | 2015-05-08 17:24:52 +0800 |
| commit | 3c08b8b561cc428b39ebb6fecc7717407bffd9da (patch) | |
| tree | 7b4edd697fafc13ff5255984b7ad3b477637623e | |
| parent | d06b7705a4a58214e101f9d327fa00d25e2359d1 (diff) | |
MLK-10554 ARM: clk-imx7d: correct the dphy reference clock settings
The mipi dsi dphy reference clock initialization is not
correct. So correct it.
Signed-off-by: Fancy Fang <chen.fang@freescale.com>
| -rw-r--r-- | arch/arm/mach-imx/clk-imx7d.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/clk-imx7d.c b/arch/arm/mach-imx/clk-imx7d.c index 2c6fc753bcf1..cd9f65bbeab3 100644 --- a/arch/arm/mach-imx/clk-imx7d.c +++ b/arch/arm/mach-imx/clk-imx7d.c @@ -733,7 +733,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) clks[IMX7D_LCDIF_PIXEL_ROOT_DIV] = imx_clk_divider("lcdif_pixel_post_div", "lcdif_pixel_pre_div", base + 0xa300, 0, 6); clks[IMX7D_MIPI_DSI_ROOT_DIV] = imx_clk_divider("mipi_dsi_post_div", "mipi_dsi_pre_div", base + 0xa380, 0, 6); clks[IMX7D_MIPI_CSI_ROOT_DIV] = imx_clk_divider("mipi_csi_post_div", "mipi_csi_pre_div", base + 0xa400, 0, 6); - clks[IMX7D_MIPI_DPHY_ROOT_DIV] = imx_clk_divider("mipi_dphy_post_div", "mipi_csi_dphy_div", base + 0xa480, 0, 6); + clks[IMX7D_MIPI_DPHY_ROOT_DIV] = imx_clk_divider("mipi_dphy_post_div", "mipi_dphy_pre_div", base + 0xa480, 0, 6); clks[IMX7D_SAI1_ROOT_DIV] = imx_clk_divider("sai1_post_div", "sai1_pre_div", base + 0xa500, 0, 6); clks[IMX7D_SAI2_ROOT_DIV] = imx_clk_divider("sai2_post_div", "sai2_pre_div", base + 0xa580, 0, 6); clks[IMX7D_SAI3_ROOT_DIV] = imx_clk_divider("sai3_post_div", "sai3_pre_div", base + 0xa600, 0, 6); |