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authorRanjani Vaidyanathan <ra5478@freescale.com>2012-09-02 10:32:35 -0500
committerJason Liu <r64343@freescale.com>2012-09-05 13:14:18 +0800
commit4b0fc8e0e6a428e4080a2de6f96d16a522dc5b31 (patch)
tree94f6fe26b86734e1d5b994595fc2d86fb606cfbe
parent5a1f83697948a0d03176946e121abe52fb19831d (diff)
ENGR00222834 MX6x-A9 prefetcher should not access DDR before IO is restored
Add enough nops to suspend code when exiting due to a pending interrupt. This is required so that we can guarantee that the prefetch unit will not bring DDR out of self-refresh before all of the DDR's IO pads are restored. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
-rw-r--r--arch/arm/mach-mx6/mx6_suspend.S34
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/mx6_suspend.S b/arch/arm/mach-mx6/mx6_suspend.S
index 0b9dc57b0091..0533ad1b20ef 100644
--- a/arch/arm/mach-mx6/mx6_suspend.S
+++ b/arch/arm/mach-mx6/mx6_suspend.S
@@ -884,6 +884,40 @@ sl_io_restore:
sl_ddr_io_restore
ddr_io_restore_done:
+ /* Add enough nops so that the
+ * prefetcher will not get instructions
+ * from DDR before its IO pads
+ * are restored.
+ */
+ nop
+ nop
+ nop
+ nop
+ nop
+
+ nop
+ nop
+ nop
+ nop
+ nop
+
+ nop
+ nop
+ nop
+ nop
+ nop
+
+ nop
+ nop
+ nop
+ nop
+ nop
+
+ nop
+ nop
+ nop
+ nop
+ nop
mrc p15, 0, r1, c1, c0, 0
orr r1, r1, #(1 << 2) @ Enable the C bit