diff options
| author | Robin Gong <B38343@freescale.com> | 2012-04-01 12:38:22 +0800 |
|---|---|---|
| committer | Robin Gong <B38343@freescale.com> | 2012-04-01 12:48:38 +0800 |
| commit | e5165afdd2d248cac396c47dfa4b44feb65c9017 (patch) | |
| tree | 5e417f8728494d770c77abd7a4abde7b91606c98 | |
| parent | 65b0925d53ce065e78a2fbba68d7fa765e8dbdb8 (diff) | |
ENGR00178629 i.MX6 sabresd:support software power off by SNVS setting
On sabresd board, PMIC_ON_REQ control pmic power on/off, we can set TOP and
DP_EN of SNVS_LPCR to implement power off by software. On this way,SNVS RTC
alarm can work after power off. The description of register can be found on
other SNVS block document which provided by IC team, not i.MX6 RM.
Signed-off-by: Robin Gong <B38343@freescale.com>
| -rw-r--r-- | arch/arm/mach-mx6/board-mx6q_sabresd.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/board-mx6q_sabresd.c b/arch/arm/mach-mx6/board-mx6q_sabresd.c index d9c44f0854bb..82beefa8f46a 100644 --- a/arch/arm/mach-mx6/board-mx6q_sabresd.c +++ b/arch/arm/mach-mx6/board-mx6q_sabresd.c @@ -1412,6 +1412,17 @@ static struct mipi_csi2_platform_data mipi_csi2_pdata = { .pixel_clk = "emi_clk", }; +#define SNVS_LPCR 0x38 +static void mx6_snvs_poweroff(void) +{ + + void __iomem *mx6_snvs_base = MX6_IO_ADDRESS(MX6Q_SNVS_BASE_ADDR); + u32 value; + value = readl(mx6_snvs_base + SNVS_LPCR); + /*set TOP and DP_EN bit*/ + writel(value | 0x60, mx6_snvs_base + SNVS_LPCR); +} + /*! * Board specific initialization. */ @@ -1597,6 +1608,8 @@ static void __init mx6_sabresd_board_init(void) gps_power_on(true); /* Register charger chips */ platform_device_register(&sabresd_max8903_charger_1); + pm_power_off = mx6_snvs_poweroff; + } extern void __iomem *twd_base; |