diff options
| author | Ranjani Vaidyanathan <ra5478@freescale.com> | 2012-04-02 16:19:29 -0500 |
|---|---|---|
| committer | Ranjani Vaidyanathan <ra5478@freescale.com> | 2012-04-02 16:41:28 -0500 |
| commit | 599b1c5fb9275920b3f612e28b7d9c45a9688719 (patch) | |
| tree | 9b19f59cc4f85ad2253b9e560856bba3c97e75f6 | |
| parent | e6b6133965aaf5fcfd9ba239be72ffa313eff647 (diff) | |
ENGR00178763: MX6-Fix TO1.0 boot-fail issue
TO1.0 parts donot boot properly after the following commit:
88d3af87222b37e454acd6a8de3b0cf18180da32
MX6-Switch ARM_CLK to PLL2_400MHz when ARM freq
is below 400MHz.
Correct gpt_clk was not getting enabled. Fix by adding the
appropriate gpt_clk.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
| -rw-r--r-- | arch/arm/mach-mx6/clock.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index fa99bb6015e0..c84d43a17c5c 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -1934,6 +1934,7 @@ static struct clk gpt_clk[] = { .enable = _clk_enable, .disable = _clk_disable, .get_rate = _clk_gpt_get_rate, + .secondary = &gpt_clk[1], }, { __INIT_CLK_DEBUG(gpt_serial_clk) |