Merge commit 'rel_imx_3.0.35_12.11.01_RC2' into imx_3.0.35_android_r13.4.y

Conflicts:
	drivers/mxc/vpu/mxc_vpu.c

37 files changed, 692 insertions, 671 deletions

diff --git a/arch/arm/configs/imx6_defconfig b/arch/arm/configs/imx6_defconfig
index f1bab5fe2838..f62ea0ebab7d 100644
--- a/arch/arm/configs/imx6_defconfig
+++ b/arch/arm/configs/imx6_defconfig
@@ -1848,7 +1848,7 @@ CONFIG_SND_IMX_SOC=y
 CONFIG_SND_MXC_SOC_MX2=y
 CONFIG_SND_MXC_SOC_SPDIF_DAI=y
 CONFIG_SND_SOC_IMX_SGTL5000=y
-CONFIG_SND_SOC_IMX_WM8958=y
+# CONFIG_SND_SOC_IMX_WM8958 is not set
 CONFIG_SND_SOC_IMX_WM8962=y
 CONFIG_SND_SOC_IMX_CS42888=y
 # CONFIG_SND_SOC_IMX_SI4763 is not set
@@ -1856,13 +1856,13 @@ CONFIG_SND_SOC_IMX_SPDIF=y
 CONFIG_SND_SOC_IMX_HDMI=y
 CONFIG_SND_SOC_I2C_AND_SPI=y
 # CONFIG_SND_SOC_ALL_CODECS is not set
-CONFIG_SND_SOC_WM_HUBS=y
+# CONFIG_SND_SOC_WM_HUBS is not set
 CONFIG_SND_SOC_MXC_HDMI=y
 CONFIG_SND_SOC_MXC_SPDIF=y
 CONFIG_SND_SOC_SGTL5000=y
 CONFIG_SND_SOC_CS42888=y
 CONFIG_SND_SOC_WM8962=y
-CONFIG_SND_SOC_WM8994=y
+# CONFIG_SND_SOC_WM8994 is not set
 # CONFIG_SOUND_PRIME is not set
 CONFIG_AC97_BUS=y
 CONFIG_HID_SUPPORT=y
diff --git a/arch/arm/configs/imx6s_defconfig b/arch/arm/configs/imx6s_defconfig
index ac7afdfdf5ff..41f43e5c0d63 100644
--- a/arch/arm/configs/imx6s_defconfig
+++ b/arch/arm/configs/imx6s_defconfig
@@ -1620,7 +1620,7 @@ CONFIG_MXC_CAMERA_OV5640=y
 # CONFIG_MXC_CAMERA_OV5640_MIPI is not set
 CONFIG_MXC_CAMERA_SENSOR_CLK=y
 CONFIG_VIDEO_MXC_OUTPUT=y
-# CONFIG_VIDEO_MXC_PXP_V4L2 is not set
+CONFIG_VIDEO_MXC_PXP_V4L2=y
 # CONFIG_VIDEO_MXC_OPL is not set
 # CONFIG_VIDEO_CPIA2 is not set
 # CONFIG_VIDEO_TIMBERDALE is not set
diff --git a/arch/arm/mach-mx6/board-mx6q_arm2.c b/arch/arm/mach-mx6/board-mx6q_arm2.c
index 883ec3e5bbdb..12f87b526253 100644
--- a/arch/arm/mach-mx6/board-mx6q_arm2.c
+++ b/arch/arm/mach-mx6/board-mx6q_arm2.c
@@ -164,6 +164,7 @@ static struct clk *sata_clk;
 static int esai_record;
 static int sgtl5000_en;
 static int spdif_en;
+static int gpmi_en;
 static int flexcan_en;
 static int disable_mipi_dsi;
 
@@ -1954,6 +1955,14 @@ static int __init early_enable_spdif(char *p)
 
 early_param("spdif", early_enable_spdif);
 
+static int __init early_enable_gpmi(char *p)
+{
+	gpmi_en = 1;
+	return 0;
+}
+
+early_param("gpmi", early_enable_gpmi);
+
 static int __init early_enable_can(char *p)
 {
 	flexcan_en = 1;
@@ -2206,7 +2215,8 @@ static void __init mx6_arm2_init(void)
 	imx6q_add_viim();
 	imx6q_add_imx2_wdt(0, NULL);
 	imx6q_add_dma();
-	imx6q_add_gpmi(&mx6_gpmi_nand_platform_data);
+	if (gpmi_en)
+		imx6q_add_gpmi(&mx6_gpmi_nand_platform_data);
 
 	imx6q_add_dvfs_core(&arm2_dvfscore_data);
 
diff --git a/arch/arm/mach-mx6/board-mx6q_sabreauto.h b/arch/arm/mach-mx6/board-mx6q_sabreauto.h
index 88cb7ff7456f..fee469abfbb0 100644
--- a/arch/arm/mach-mx6/board-mx6q_sabreauto.h
+++ b/arch/arm/mach-mx6/board-mx6q_sabreauto.h
@@ -257,8 +257,6 @@ static iomux_v3_cfg_t mx6q_gpmi_nand[] __initdata = {
 	MX6Q_PAD_NANDF_ALE__RAWNAND_ALE,
 	MX6Q_PAD_NANDF_CS0__RAWNAND_CE0N,
 	MX6Q_PAD_NANDF_CS1__RAWNAND_CE1N,
-	MX6Q_PAD_NANDF_CS2__RAWNAND_CE2N,
-	MX6Q_PAD_NANDF_CS3__RAWNAND_CE3N,
 	MX6Q_PAD_NANDF_RB0__RAWNAND_READY0,
 	MX6Q_PAD_SD4_DAT0__RAWNAND_DQS,
 	MX6Q_PAD_NANDF_D0__RAWNAND_D0,
diff --git a/arch/arm/mach-mx6/board-mx6solo_sabreauto.h b/arch/arm/mach-mx6/board-mx6solo_sabreauto.h
index b752faae33ba..18f5d9062e86 100644
--- a/arch/arm/mach-mx6/board-mx6solo_sabreauto.h
+++ b/arch/arm/mach-mx6/board-mx6solo_sabreauto.h
@@ -254,8 +254,6 @@ static iomux_v3_cfg_t mx6dl_gpmi_nand[] __initdata = {
 	MX6DL_PAD_NANDF_ALE__RAWNAND_ALE,
 	MX6DL_PAD_NANDF_CS0__RAWNAND_CE0N,
 	MX6DL_PAD_NANDF_CS1__RAWNAND_CE1N,
-	MX6DL_PAD_NANDF_CS2__RAWNAND_CE2N,
-	MX6DL_PAD_NANDF_CS3__RAWNAND_CE3N,
 	MX6DL_PAD_NANDF_RB0__RAWNAND_READY0,
 	MX6DL_PAD_SD4_DAT0__RAWNAND_DQS,
 	MX6DL_PAD_NANDF_D0__RAWNAND_D0,
diff --git a/arch/arm/mach-mx6/mx6_anatop_regulator.c b/arch/arm/mach-mx6/mx6_anatop_regulator.c
index f2c2ebf600b3..9599a5439e54 100644
--- a/arch/arm/mach-mx6/mx6_anatop_regulator.c
+++ b/arch/arm/mach-mx6/mx6_anatop_regulator.c
@@ -273,6 +273,24 @@ static int is_enabled(struct anatop_regulator *sreg)
 {
 	return 1;
 }
+static int vdd3p0_enable(struct anatop_regulator *sreg)
+{
+	__raw_writel(BM_ANADIG_REG_3P0_ENABLE_LINREG,
+					sreg->rdata->control_reg+4);
+	return 0;
+}
+
+static int vdd3p0_disable(struct anatop_regulator *sreg)
+{
+	__raw_writel(BM_ANADIG_REG_3P0_ENABLE_LINREG,
+					sreg->rdata->control_reg+8);
+	return 0;
+}
+
+static int vdd3p0_is_enabled(struct anatop_regulator *sreg)
+{
+	return !!(__raw_readl(sreg->rdata->control_reg) & BM_ANADIG_REG_3P0_ENABLE_LINREG);
+}
 
 static struct anatop_regulator_data vddpu_data = {
 	.name		= "vddpu",
@@ -353,15 +371,15 @@ static struct anatop_regulator_data vdd3p0_data = {
 	.name		= "vdd3p0",
 	.set_voltage	= set_voltage,
 	.get_voltage	= get_voltage,
-	.enable		= enable,
-	.disable	= disable,
-	.is_enabled	= is_enabled,
+	.enable		= vdd3p0_enable,
+	.disable		= vdd3p0_disable,
+	.is_enabled	= vdd3p0_is_enabled,
 	.control_reg	= (u32)(MXC_PLL_BASE + HW_ANADIG_REG_3P0),
 	.vol_bit_shift	= 8,
 	.vol_bit_mask	= 0x1F,
-	.min_bit_val	= 7,
-	.min_voltage	= 2800000,
-	.max_voltage	= 3150000,
+	.min_bit_val	= 0,
+	.min_voltage	= 2625000,
+	.max_voltage	= 3400000,
 };
 
 /* CPU */
@@ -386,6 +404,13 @@ static struct regulator_consumer_supply vddsoc_consumers[] = {
 	},
 };
 
+/* USB phy 3P0 */
+static struct regulator_consumer_supply vdd3p0_consumers[] = {
+	{
+		.supply = "cpu_vdd3p0",
+	},
+};
+
 static struct regulator_init_data vddpu_init = {
 	.constraints = {
 		.name			= "vddpu",
@@ -467,16 +492,17 @@ static struct regulator_init_data vdd1p1_init = {
 static struct regulator_init_data vdd3p0_init = {
 	.constraints = {
 		.name			= "vdd3p0",
-		.min_uV			= 2800000,
-		.max_uV			= 3150000,
+		.min_uV			= 2625000,
+		.max_uV			= 3400000,
 		.valid_modes_mask	= REGULATOR_MODE_FAST |
 					  REGULATOR_MODE_NORMAL,
 		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE |
-					  REGULATOR_CHANGE_MODE,
-		.always_on		= 1,
+					  REGULATOR_CHANGE_MODE |
+					  REGULATOR_CHANGE_STATUS,
+		.always_on		= 0,
 	},
-	.num_consumer_supplies = 0,
-	.consumer_supplies = NULL,
+	.num_consumer_supplies = ARRAY_SIZE(vdd3p0_consumers),
+	.consumer_supplies = &vdd3p0_consumers[0],
 };
 
 static struct anatop_regulator vddpu_reg = {
diff --git a/arch/arm/mach-mx6/mx6q_sabreauto_pmic_pfuze100.c b/arch/arm/mach-mx6/mx6q_sabreauto_pmic_pfuze100.c
index 8cb4ffcc78fa..3987777d56ff 100644
--- a/arch/arm/mach-mx6/mx6q_sabreauto_pmic_pfuze100.c
+++ b/arch/arm/mach-mx6/mx6q_sabreauto_pmic_pfuze100.c
@@ -24,7 +24,11 @@
 #include <linux/gpio.h>
 #include <linux/regulator/machine.h>
 #include <linux/mfd/pfuze.h>
+#include <linux/io.h>
 #include <mach/irqs.h>
+#include "crm_regs.h"
+#include "regs-anadig.h"
+#include "cpu_op-mx6.h"
 
 /*
  * Convenience conversion.
@@ -38,32 +42,21 @@
 #define PFUZE100_I2C_DEVICE_NAME  "pfuze100"
 /* 7-bit I2C bus slave address */
 #define PFUZE100_I2C_ADDR         (0x08)
-
- /*SWBST*/
-#define PFUZE100_SW1ASTANDBY    33
-#define PFUZE100_SW1ASTANDBY_STBY_VAL   (0x19)
-#define PFUZE100_SW1ASTANDBY_STBY_M     (0x3f<<0)
-#define PFUZE100_SW1BSTANDBY   40
-#define PFUZE100_SW1BSTANDBY_STBY_VAL  (0x19)
-#define PFUZE100_SW1BSTANDBY_STBY_M    (0x3f<<0)
-#define PFUZE100_SW1CSTANDBY    47
-#define PFUZE100_SW1CSTANDBY_STBY_VAL   (0x19)
-#define PFUZE100_SW1CSTANDBY_STBY_M     (0x3f<<0)
-#define PFUZE100_SW2STANDBY     54
-#define PFUZE100_SW2STANDBY_STBY_VAL    0x0
-#define PFUZE100_SW2STANDBY_STBY_M      (0x3f<<0)
-#define PFUZE100_SW3ASTANDBY    61
-#define PFUZE100_SW3ASTANDBY_STBY_VAL   0x0
-#define PFUZE100_SW3ASTANDBY_STBY_M     (0x3f<<0)
-#define PFUZE100_SW3BSTANDBY    68
-#define PFUZE100_SW3BSTANDBY_STBY_VAL   0x0
-#define PFUZE100_SW3BSTANDBY_STBY_M     (0x3f<<0)
-#define PFUZE100_SW4STANDBY     75
-#define PFUZE100_SW4STANDBY_STBY_VAL    0
-#define PFUZE100_SW4STANDBY_STBY_M      (0x3f<<0)
-#define PFUZE100_SWBSTCON1      102
-#define PFUZE100_SWBSTCON1_SWBSTMOD_VAL (0x1<<2)
-#define PFUZE100_SWBSTCON1_SWBSTMOD_M   (0x3<<2)
+#define PFUZE100_DEVICEID		(0x0)
+#define PFUZE100_REVID			(0x3)
+#define PFUZE100_SW1AMODE		(0x23)
+#define PFUZE100_SW1AVOL       32
+#define PFUZE100_SW1AVOL_VSEL_M        (0x3f<<0)
+#define PFUZE100_SW1CVOL       46
+#define PFUZE100_SW1CVOL_VSEL_M        (0x3f<<0)
+#define PFUZE100_SW1ACON		36
+#define PFUZE100_SW1ACON_SPEED_VAL	(0x1<<6)	/*default */
+#define PFUZE100_SW1ACON_SPEED_M	(0x3<<6)
+#define PFUZE100_SW1CCON		49
+#define PFUZE100_SW1CCON_SPEED_VAL	(0x1<<6)	/*default */
+#define PFUZE100_SW1CCON_SPEED_M	(0x3<<6)
+
+extern u32 arm_max_freq;
 
 static struct regulator_consumer_supply sw1a_consumers[] = {
 	{
@@ -157,7 +150,13 @@ static struct regulator_init_data sw1a_init = {
 			.valid_modes_mask = 0,
 			.boot_on = 1,
 			.always_on = 1,
+			.initial_state = PM_SUSPEND_MEM,
+			.state_mem = {
+				.uV = 975000,/*0.9V+6%*/
+				.mode = REGULATOR_MODE_NORMAL,
+				.enabled = 1,
 			},
+	},
 	.num_consumer_supplies = ARRAY_SIZE(sw1a_consumers),
 	.consumer_supplies = sw1a_consumers,
 };
@@ -183,7 +182,13 @@ static struct regulator_init_data sw1c_init = {
 			.valid_modes_mask = 0,
 			.always_on = 1,
 			.boot_on = 1,
+			.initial_state = PM_SUSPEND_MEM,
+			.state_mem = {
+				.uV = 975000,/*0.9V+6%*/
+				.mode = REGULATOR_MODE_NORMAL,
+				.enabled = 1,
 			},
+	},
 	.num_consumer_supplies = ARRAY_SIZE(sw1c_consumers),
 	.consumer_supplies = sw1c_consumers,
 };
@@ -391,20 +396,82 @@ static struct regulator_init_data vgen6_init = {
 
 static int pfuze100_init(struct mc_pfuze *pfuze)
 {
-	int ret;
-	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1ASTANDBY,
-			    PFUZE100_SW1ASTANDBY_STBY_M,
-			    PFUZE100_SW1ASTANDBY_STBY_VAL);
+	int ret, i;
+	unsigned int reg;
+	unsigned char value;
+	/*read Device ID*/
+	ret = pfuze_reg_read(pfuze, PFUZE100_DEVICEID, &value);
+	if (ret)
+		goto err;
+	if (value != 0x10) {
+		printk(KERN_ERR "wrong device id:%x!\n", value);
+		goto err;
+	}
+
+	/*read Revision ID*/
+	ret = pfuze_reg_read(pfuze, PFUZE100_REVID, &value);
 	if (ret)
 		goto err;
-	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1BSTANDBY,
-			    PFUZE100_SW1BSTANDBY_STBY_M,
-			    PFUZE100_SW1BSTANDBY_STBY_VAL);
+	if (value == 0x10) {
+		printk(KERN_WARNING "PF100 1.0 chip found!\n");
+	/* workaround ER1 of pfuze1.0: set all buck regulators in PWM mode
+	* except SW1C(APS) in normal and  PFM mode in standby.
+	*/
+		for (i = 0; i < 7; i++) {
+			if (i == 2)/*SW1C*/
+				value = 0xc;/*normal:APS mode;standby:PFM mode*/
+			else
+				value = 0xd;/*normal:PWM mode;standby:PFM mode*/
+			ret = pfuze_reg_write(pfuze,
+					PFUZE100_SW1AMODE + (i * 7),
+					value);
+			if (ret)
+				goto err;
+		}
+
+	} else {
+	/*set all switches APS in normal and PFM mode in standby*/
+		for (i = 0; i < 7; i++) {
+			value = 0xc;
+			ret = pfuze_reg_write(pfuze,
+					PFUZE100_SW1AMODE + (i * 7),
+					value);
+			if (ret)
+				goto err;
+		}
+
+	}
+	if (arm_max_freq == CPU_AT_1_2GHz) {
+		/*VDDARM_IN 1.475V*/
+		ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1AVOL,
+					PFUZE100_SW1AVOL_VSEL_M,
+					0x2f);
+		if (ret)
+			goto err;
+		/*VDDSOC_IN 1.475V*/
+		ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1CVOL,
+					PFUZE100_SW1CVOL_VSEL_M,
+					0x2f);
+		if (ret)
+			goto err;
+		/*set VDDSOC&VDDPU to 1.25V*/
+		reg = __raw_readl(ANADIG_REG_CORE);
+		reg &= ~BM_ANADIG_REG_CORE_REG2_TRG;
+		reg |= BF_ANADIG_REG_CORE_REG2_TRG(0x16);
+		reg &= ~BM_ANADIG_REG_CORE_REG1_TRG;
+		reg |= BF_ANADIG_REG_CORE_REG1_TRG(0x16);
+		__raw_writel(reg, ANADIG_REG_CORE);
+
+	}
+	/*set SW1AB/1C DVSPEED as 25mV step each 4us,quick than 16us before.*/
+	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1ACON,
+			    PFUZE100_SW1ACON_SPEED_M,
+			    PFUZE100_SW1ACON_SPEED_VAL);
 	if (ret)
 		goto err;
-	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1CSTANDBY,
-			    PFUZE100_SW1CSTANDBY_STBY_M,
-			    PFUZE100_SW1CSTANDBY_STBY_VAL);
+	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1CCON,
+			    PFUZE100_SW1CCON_SPEED_M,
+			    PFUZE100_SW1CCON_SPEED_VAL);
 	if (ret)
 		goto err;
 	return 0;
diff --git a/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c b/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c
index cbde44955f03..6b38bd000bc0 100644
--- a/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c
+++ b/arch/arm/mach-mx6/mx6q_sabresd_pmic_pfuze100.c
@@ -41,36 +41,14 @@
 
 #define PFUZE100_I2C_DEVICE_NAME  "pfuze100"
 /* 7-bit I2C bus slave address */
-#define PFUZE100_I2C_ADDR         (0x08)
- /*SWBST*/
-#define PFUZE100_SW1AVOL	32
-#define PFUZE100_SW1AVOL_VSEL_M	(0x3f<<0)
-#define PFUZE100_SW1CVOL	46
-#define PFUZE100_SW1CVOL_VSEL_M	(0x3f<<0)
-#define PFUZE100_SW1ASTANDBY	33
-#define PFUZE100_SW1ASTANDBY_STBY_VAL	(0x19)
-#define PFUZE100_SW1ASTANDBY_STBY_M	(0x3f<<0)
-#define PFUZE100_SW1BSTANDBY   40
-#define PFUZE100_SW1BSTANDBY_STBY_VAL  (0x19)
-#define PFUZE100_SW1BSTANDBY_STBY_M    (0x3f<<0)
-#define PFUZE100_SW1CSTANDBY	47
-#define PFUZE100_SW1CSTANDBY_STBY_VAL	(0x19)
-#define PFUZE100_SW1CSTANDBY_STBY_M	(0x3f<<0)
-#define PFUZE100_SW2STANDBY     54
-#define PFUZE100_SW2STANDBY_STBY_VAL    0x0
-#define PFUZE100_SW2STANDBY_STBY_M      (0x3f<<0)
-#define PFUZE100_SW3ASTANDBY    61
-#define PFUZE100_SW3ASTANDBY_STBY_VAL   0x0
-#define PFUZE100_SW3ASTANDBY_STBY_M     (0x3f<<0)
-#define PFUZE100_SW3BSTANDBY    68
-#define PFUZE100_SW3BSTANDBY_STBY_VAL   0x0
-#define PFUZE100_SW3BSTANDBY_STBY_M     (0x3f<<0)
-#define PFUZE100_SW4STANDBY     75
-#define PFUZE100_SW4STANDBY_STBY_VAL    0
-#define PFUZE100_SW4STANDBY_STBY_M      (0x3f<<0)
-#define PFUZE100_SWBSTCON1	102
-#define PFUZE100_SWBSTCON1_SWBSTMOD_VAL	(0x1<<2)
-#define PFUZE100_SWBSTCON1_SWBSTMOD_M	(0x3<<2)
+#define PFUZE100_I2C_ADDR		(0x08)
+#define PFUZE100_DEVICEID		(0x0)
+#define PFUZE100_REVID			(0x3)
+#define PFUZE100_SW1AMODE		(0x23)
+#define PFUZE100_SW1AVOL       32
+#define PFUZE100_SW1AVOL_VSEL_M        (0x3f<<0)
+#define PFUZE100_SW1CVOL       46
+#define PFUZE100_SW1CVOL_VSEL_M        (0x3f<<0)
 #define PFUZE100_SW1ACON		36
 #define PFUZE100_SW1ACON_SPEED_VAL	(0x1<<6)	/*default */
 #define PFUZE100_SW1ACON_SPEED_M	(0x3<<6)
@@ -166,7 +144,13 @@ static struct regulator_init_data sw1a_init = {
 			.valid_modes_mask = 0,
 			.boot_on = 1,
 			.always_on = 1,
+			.initial_state = PM_SUSPEND_MEM,
+			.state_mem = {
+				.uV = 975000,/*0.9V+6%*/
+				.mode = REGULATOR_MODE_NORMAL,
+				.enabled = 1,
 			},
+	},
 
 #ifdef CONFIG_MX6_INTER_LDO_BYPASS
 	.num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
@@ -195,7 +179,13 @@ static struct regulator_init_data sw1c_init = {
 			.valid_modes_mask = 0,
 			.always_on = 1,
 			.boot_on = 1,
+			.initial_state = PM_SUSPEND_MEM,
+			.state_mem = {
+				.uV = 975000,/*0.9V+6%*/
+				.mode = REGULATOR_MODE_NORMAL,
+				.enabled = 1,
 			},
+	},
 #ifdef CONFIG_MX6_INTER_LDO_BYPASS
 	.num_consumer_supplies = ARRAY_SIZE(sw1c_consumers),
 	.consumer_supplies = sw1c_consumers,
@@ -399,8 +389,52 @@ static struct regulator_init_data vgen6_init = {
 
 static int pfuze100_init(struct mc_pfuze *pfuze)
 {
-	int ret;
+	int ret, i;
 	unsigned int reg;
+	unsigned char value;
+	/*read Device ID*/
+	ret = pfuze_reg_read(pfuze, PFUZE100_DEVICEID, &value);
+	if (ret)
+		goto err;
+	if (value != 0x10) {
+		printk(KERN_ERR "wrong device id:%x!\n", value);
+		goto err;
+	}
+
+	/*read Revision ID*/
+	ret = pfuze_reg_read(pfuze, PFUZE100_REVID, &value);
+	if (ret)
+		goto err;
+	if (value == 0x10) {
+		printk(KERN_WARNING "PF100 1.0 chip found!\n");
+	/* workaround ER1 of pfuze1.0: set all buck regulators in PWM mode
+	* except SW1C(APS) in normal and  PFM mode in standby.
+	*/
+		for (i = 0; i < 7; i++) {
+			if (i == 2)/*SW1C*/
+				value = 0xc;/*normal:APS mode;standby:PFM mode*/
+			else
+				value = 0xd;/*normal:PWM mode;standby:PFM mode*/
+			ret = pfuze_reg_write(pfuze,
+					PFUZE100_SW1AMODE + (i * 7),
+					value);
+			if (ret)
+				goto err;
+		}
+
+	} else {
+	/*set all switches APS in normal and PFM mode in standby*/
+		for (i = 0; i < 7; i++) {
+			value = 0xc;
+			ret = pfuze_reg_write(pfuze,
+					PFUZE100_SW1AMODE + (i * 7),
+					value);
+			if (ret)
+				goto err;
+		}
+
+	}
+
 	if (arm_max_freq == CPU_AT_1_2GHz) {
 		/*VDDARM_IN 1.475V*/
 		ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1AVOL,
@@ -423,16 +457,6 @@ static int pfuze100_init(struct mc_pfuze *pfuze)
 		__raw_writel(reg, ANADIG_REG_CORE);
 
 	}
-	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1ASTANDBY,
-			    PFUZE100_SW1ASTANDBY_STBY_M,
-			    PFUZE100_SW1ASTANDBY_STBY_VAL);
-	if (ret)
-		goto err;
-	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1CSTANDBY,
-			    PFUZE100_SW1CSTANDBY_STBY_M,
-			    PFUZE100_SW1CSTANDBY_STBY_VAL);
-	if (ret)
-		goto err;
 	/*set SW1AB/1C DVSPEED as 25mV step each 4us,quick than 16us before.*/
 	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1ACON,
 			    PFUZE100_SW1ACON_SPEED_M,
diff --git a/arch/arm/mach-mx6/mx6sl_arm2_pmic_pfuze100.c b/arch/arm/mach-mx6/mx6sl_arm2_pmic_pfuze100.c
index 5cf34073bdc1..55a802b76b68 100644
--- a/arch/arm/mach-mx6/mx6sl_arm2_pmic_pfuze100.c
+++ b/arch/arm/mach-mx6/mx6sl_arm2_pmic_pfuze100.c
@@ -38,31 +38,9 @@
 #define PFUZE100_I2C_DEVICE_NAME  "pfuze100"
 /* 7-bit I2C bus slave address */
 #define PFUZE100_I2C_ADDR         (0x08)
- /*SWBST*/
-#define PFUZE100_SW1ASTANDBY	33
-#define PFUZE100_SW1ASTANDBY_STBY_VAL	(0x19)	/* 925mV */
-#define PFUZE100_SW1ASTANDBY_STBY_M	(0x3f<<0)
-#define PFUZE100_SW1BSTANDBY   40
-#define PFUZE100_SW1BSTANDBY_STBY_VAL  (0x19)	/* 925mV */
-#define PFUZE100_SW1BSTANDBY_STBY_M    (0x3f<<0)
-#define PFUZE100_SW1CSTANDBY	47
-#define PFUZE100_SW1CSTANDBY_STBY_VAL	(0x19)	/* 925mV */
-#define PFUZE100_SW1CSTANDBY_STBY_M	(0x3f<<0)
-#define PFUZE100_SW2STANDBY     54
-#define PFUZE100_SW2STANDBY_STBY_VAL    0x0
-#define PFUZE100_SW2STANDBY_STBY_M      (0x3f<<0)
-#define PFUZE100_SW3ASTANDBY    61
-#define PFUZE100_SW3ASTANDBY_STBY_VAL   0x0
-#define PFUZE100_SW3ASTANDBY_STBY_M     (0x3f<<0)
-#define PFUZE100_SW3BSTANDBY    68
-#define PFUZE100_SW3BSTANDBY_STBY_VAL   0x0
-#define PFUZE100_SW3BSTANDBY_STBY_M     (0x3f<<0)
-#define PFUZE100_SW4STANDBY     75
-#define PFUZE100_SW4STANDBY_STBY_VAL    0
-#define PFUZE100_SW4STANDBY_STBY_M      (0x3f<<0)
-#define PFUZE100_SWBSTCON1	102
-#define PFUZE100_SWBSTCON1_SWBSTMOD_VAL	(0x1<<2)
-#define PFUZE100_SWBSTCON1_SWBSTMOD_M	(0x3<<2)
+#define PFUZE100_DEVICEID		(0x0)
+#define PFUZE100_REVID			(0x3)
+#define PFUZE100_SW1AMODE		(0x23)
 #define PFUZE100_SW1ACON		36
 #define PFUZE100_SW1ACON_SPEED_VAL	(0x1<<6)	/*default */
 #define PFUZE100_SW1ACON_SPEED_M	(0x3<<6)
@@ -158,7 +136,13 @@ static struct regulator_init_data sw1a_init = {
 			.valid_modes_mask = 0,
 			.boot_on = 1,
 			.always_on = 1,
+			.initial_state = PM_SUSPEND_MEM,
+			.state_mem = {
+				.uV = 975000,/*0.9V+6%*/
+				.mode = REGULATOR_MODE_NORMAL,
+				.enabled = 1,
 			},
+	},
 #ifdef CONFIG_MX6_INTER_LDO_BYPASS
 	.num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
 	.consumer_supplies = sw1_consumers,
@@ -186,7 +170,13 @@ static struct regulator_init_data sw1c_init = {
 			.valid_modes_mask = 0,
 			.always_on = 1,
 			.boot_on = 1,
+			.initial_state = PM_SUSPEND_MEM,
+			.state_mem = {
+				.uV = 975000,/*0.9V+6%*/
+				.mode = REGULATOR_MODE_NORMAL,
+				.enabled = 1,
 			},
+	},
 	#ifdef CONFIG_MX6_INTER_LDO_BYPASS
 	.num_consumer_supplies = ARRAY_SIZE(sw1c_consumers),
 	.consumer_supplies = sw1c_consumers,
@@ -392,17 +382,51 @@ static struct regulator_init_data vgen6_init = {
 
 static int pfuze100_init(struct mc_pfuze *pfuze)
 {
-	int ret;
-	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1ASTANDBY,
-			    PFUZE100_SW1ASTANDBY_STBY_M,
-			    PFUZE100_SW1ASTANDBY_STBY_VAL);
+	int ret, i;
+	unsigned int reg;
+	unsigned char value;
+	/*read Device ID*/
+	ret = pfuze_reg_read(pfuze, PFUZE100_DEVICEID, &value);
 	if (ret)
 		goto err;
-	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1CSTANDBY,
-			    PFUZE100_SW1CSTANDBY_STBY_M,
-			    PFUZE100_SW1CSTANDBY_STBY_VAL);
+	if (value != 0x10) {
+		printk(KERN_ERR "wrong device id:%x!\n", value);
+		goto err;
+	}
+
+	/*read Revision ID*/
+	ret = pfuze_reg_read(pfuze, PFUZE100_REVID, &value);
 	if (ret)
 		goto err;
+	if (value == 0x10) {
+		printk(KERN_WARNING "PF100 1.0 chip found!\n");
+	/* workaround ER1 of pfuze1.0: set all buck regulators in PWM mode
+	* except SW1C(APS) in normal and  PFM mode in standby.
+	*/
+		for (i = 0; i < 7; i++) {
+			if (i == 2)/*SW1C*/
+				value = 0xc;/*normal:APS mode;standby:PFM mode*/
+			else
+				value = 0xd;/*normal:PWM mode;standby:PFM mode*/
+			ret = pfuze_reg_write(pfuze,
+					PFUZE100_SW1AMODE + (i * 7),
+					value);
+			if (ret)
+				goto err;
+		}
+
+	} else {
+	/*set all switches APS in normal and PFM mode in standby*/
+		for (i = 0; i < 7; i++) {
+			value = 0xc;
+			ret = pfuze_reg_write(pfuze,
+					PFUZE100_SW1AMODE + (i * 7),
+					value);
+			if (ret)
+				goto err;
+		}
+
+	}
 	/*set SW1AB/SW1C DVSPEED as 25mV step each 4us,quick than 16us before.*/
 	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1ACON,
 			    PFUZE100_SW1ACON_SPEED_M,
diff --git a/arch/arm/mach-mx6/mx6sl_evk_pmic_pfuze100.c b/arch/arm/mach-mx6/mx6sl_evk_pmic_pfuze100.c
index 981d149d7aee..bfd5fafc1d1b 100644
--- a/arch/arm/mach-mx6/mx6sl_evk_pmic_pfuze100.c
+++ b/arch/arm/mach-mx6/mx6sl_evk_pmic_pfuze100.c
@@ -38,31 +38,9 @@
 #define PFUZE100_I2C_DEVICE_NAME  "pfuze100"
 /* 7-bit I2C bus slave address */
 #define PFUZE100_I2C_ADDR         (0x08)
- /*SWBST*/
-#define PFUZE100_SW1ASTANDBY	33
-#define PFUZE100_SW1ASTANDBY_STBY_VAL	(0x19)	/* 925mv */
-#define PFUZE100_SW1ASTANDBY_STBY_M	(0x3f<<0)
-#define PFUZE100_SW1BSTANDBY   40
-#define PFUZE100_SW1BSTANDBY_STBY_VAL  (0x19)	/* 925mv */
-#define PFUZE100_SW1BSTANDBY_STBY_M    (0x3f<<0)
-#define PFUZE100_SW1CSTANDBY	47
-#define PFUZE100_SW1CSTANDBY_STBY_VAL	(0x19)	/* 925mv */
-#define PFUZE100_SW1CSTANDBY_STBY_M	(0x3f<<0)
-#define PFUZE100_SW2STANDBY     54
-#define PFUZE100_SW2STANDBY_STBY_VAL    0x0
-#define PFUZE100_SW2STANDBY_STBY_M      (0x3f<<0)
-#define PFUZE100_SW3ASTANDBY    61
-#define PFUZE100_SW3ASTANDBY_STBY_VAL   0x0
-#define PFUZE100_SW3ASTANDBY_STBY_M     (0x3f<<0)
-#define PFUZE100_SW3BSTANDBY    68
-#define PFUZE100_SW3BSTANDBY_STBY_VAL   0x0
-#define PFUZE100_SW3BSTANDBY_STBY_M     (0x3f<<0)
-#define PFUZE100_SW4STANDBY     75
-#define PFUZE100_SW4STANDBY_STBY_VAL    0
-#define PFUZE100_SW4STANDBY_STBY_M      (0x3f<<0)
-#define PFUZE100_SWBSTCON1	102
-#define PFUZE100_SWBSTCON1_SWBSTMOD_VAL	(0x1<<2)
-#define PFUZE100_SWBSTCON1_SWBSTMOD_M	(0x3<<2)
+#define PFUZE100_DEVICEID		(0x0)
+#define PFUZE100_REVID			(0x3)
+#define PFUZE100_SW1AMODE		(0x23)
 #define PFUZE100_SW1ACON		36
 #define PFUZE100_SW1ACON_SPEED_VAL	(0x1<<6)	/*default */
 #define PFUZE100_SW1ACON_SPEED_M	(0x3<<6)
@@ -161,7 +139,13 @@ static struct regulator_init_data sw1a_init = {
 			.valid_modes_mask = 0,
 			.boot_on = 1,
 			.always_on = 1,
+			.initial_state = PM_SUSPEND_MEM,
+			.state_mem = {
+				.uV = 975000,/*0.9V+6%*/
+				.mode = REGULATOR_MODE_NORMAL,
+				.enabled = 1,
 			},
+	},
 #ifdef CONFIG_MX6_INTER_LDO_BYPASS
 	.num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
 	.consumer_supplies = sw1_consumers,
@@ -189,7 +173,13 @@ static struct regulator_init_data sw1c_init = {
 			.valid_modes_mask = 0,
 			.always_on = 1,
 			.boot_on = 1,
+			.initial_state = PM_SUSPEND_MEM,
+			.state_mem = {
+				.uV = 975000,/*0.9V+6%*/
+				.mode = REGULATOR_MODE_NORMAL,
+				.enabled = 1,
 			},
+	},
 #ifdef CONFIG_MX6_INTER_LDO_BYPASS
 	.num_consumer_supplies = ARRAY_SIZE(sw1c_consumers),
 	.consumer_supplies = sw1c_consumers,
@@ -397,17 +387,52 @@ static struct regulator_init_data vgen6_init = {
 
 static int pfuze100_init(struct mc_pfuze *pfuze)
 {
-	int ret;
-	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1ASTANDBY,
-			    PFUZE100_SW1ASTANDBY_STBY_M,
-			    PFUZE100_SW1ASTANDBY_STBY_VAL);
+	int ret, i;
+	unsigned int reg;
+	unsigned char value;
+	/*read Device ID*/
+	ret = pfuze_reg_read(pfuze, PFUZE100_DEVICEID, &value);
 	if (ret)
 		goto err;
-	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1CSTANDBY,
-			    PFUZE100_SW1CSTANDBY_STBY_M,
-			    PFUZE100_SW1CSTANDBY_STBY_VAL);
+	if (value != 0x10) {
+		printk(KERN_ERR "wrong device id:%x!\n", value);
+		goto err;
+	}
+
+	/*read Revision ID*/
+	ret = pfuze_reg_read(pfuze, PFUZE100_REVID, &value);
 	if (ret)
 		goto err;
+	if (value == 0x10) {
+		printk(KERN_WARNING "PF100 1.0 chip found!\n");
+	/* workaround ER1 of pfuze1.0: set all buck regulators in PWM mode
+	* except SW1C(APS) in normal and  PFM mode in standby.
+	*/
+		for (i = 0; i < 7; i++) {
+			if (i == 2)/*SW1C*/
+				value = 0xc;/*normal:APS mode;standby:PFM mode*/
+			else
+				value = 0xd;/*normal:PWM mode;standby:PFM mode*/
+			ret = pfuze_reg_write(pfuze,
+					PFUZE100_SW1AMODE + (i * 7),
+					value);
+			if (ret)
+				goto err;
+		}
+
+	} else {
+	/*set all switches APS in normal and PFM mode in standby*/
+		for (i = 0; i < 7; i++) {
+			value = 0xc;
+			ret = pfuze_reg_write(pfuze,
+					PFUZE100_SW1AMODE + (i * 7),
+					value);
+			if (ret)
+				goto err;
+		}
+
+	}
+
 	/*set SW1AB/SW1CDVSPEED as 25mV step each 4us,quick than 16us before.*/
 	ret = pfuze_reg_rmw(pfuze, PFUZE100_SW1ACON,
 			    PFUZE100_SW1ACON_SPEED_M,
diff --git a/arch/arm/mach-mx6/pm.c b/arch/arm/mach-mx6/pm.c
index b29c6f6ab0d3..18b8de8a8e87 100644
--- a/arch/arm/mach-mx6/pm.c
+++ b/arch/arm/mach-mx6/pm.c
@@ -68,11 +68,13 @@
 #define LOCAL_TWD_INT_OFFSET		0xc
 #define ANATOP_REG_2P5_OFFSET		0x130
 #define ANATOP_REG_CORE_OFFSET		0x140
+#define VDD3P0_VOLTAGE                   3200000
 
 static struct clk *cpu_clk;
 static struct clk *axi_clk;
 static struct clk *periph_clk;
 static struct clk *pll3_usb_otg_main_clk;
+static struct regulator *vdd3p0_regulator;
 
 static struct pm_platform_data *pm_data;
 
@@ -178,6 +180,8 @@ static void usb_power_up_handler(void)
 
 static void disp_power_down(void)
 {
+#if !defined(CONFIG_FB_MXC_ELCDIF_FB) && \
+    !defined(CONFIG_FB_MXC_ELCDIF_FB_MODULE)
 	if (cpu_is_mx6sl()) {
 		__raw_writel(0xFFFFFFFF, gpc_base + GPC_PGC_DISP_PUPSCR_OFFSET);
 		__raw_writel(0xFFFFFFFF, gpc_base + GPC_PGC_DISP_PDNSCR_OFFSET);
@@ -194,10 +198,13 @@ static void disp_power_down(void)
 			~MXC_CCM_CCGRx_CG1_MASK, MXC_CCM_CCGR3);
 
 	}
+#endif
 }
 
 static void disp_power_up(void)
 {
+#if !defined(CONFIG_FB_MXC_ELCDIF_FB) && \
+    !defined(CONFIG_FB_MXC_ELCDIF_FB_MODULE)
 	if (cpu_is_mx6sl()) {
 		/*
 		 * Need to enable EPDC/LCDIF pix clock, and
@@ -214,6 +221,7 @@ static void disp_power_up(void)
 		__raw_writel(0x20, gpc_base + GPC_CNTR_OFFSET);
 		__raw_writel(0x1, gpc_base + GPC_PGC_DISP_SR_OFFSET);
 	}
+#endif
 }
 
 static void mx6_suspend_store(void)
@@ -404,7 +412,12 @@ static int mx6_suspend_enter(suspend_state_t state)
  */
 static int mx6_suspend_prepare(void)
 {
-
+	int ret;
+	ret = regulator_disable(vdd3p0_regulator);
+	if (ret) {
+		printk(KERN_ERR "%s: failed to disable 3p0 regulator Err: %d\n",
+							__func__, ret);
+	}
 	return 0;
 }
 
@@ -413,6 +426,12 @@ static int mx6_suspend_prepare(void)
  */
 static void mx6_suspend_finish(void)
 {
+	int ret;
+	ret = regulator_enable(vdd3p0_regulator);
+	if (ret) {
+		printk(KERN_ERR "%s: failed to enable 3p0 regulator Err: %d\n",
+						__func__, ret);
+	}
 }
 
 #ifdef CONFIG_MX6_INTER_LDO_BYPASS
@@ -466,6 +485,7 @@ static struct platform_driver mx6_pm_driver = {
 
 static int __init pm_init(void)
 {
+	int ret = 0;
 	scu_base = IO_ADDRESS(SCU_BASE_ADDR);
 	gpc_base = IO_ADDRESS(GPC_BASE_ADDR);
 	src_base = IO_ADDRESS(SRC_BASE_ADDR);
@@ -523,6 +543,24 @@ static int __init pm_init(void)
 		return PTR_ERR(pll3_usb_otg_main_clk);
 	}
 
+	vdd3p0_regulator = regulator_get(NULL, "cpu_vdd3p0");
+	if (IS_ERR(vdd3p0_regulator)) {
+		printk(KERN_ERR "%s: failed to get 3p0 regulator Err: %d\n",
+						__func__, ret);
+		return PTR_ERR(vdd3p0_regulator);
+	}
+	ret = regulator_set_voltage(vdd3p0_regulator, VDD3P0_VOLTAGE,
+							VDD3P0_VOLTAGE);
+	if (ret) {
+		printk(KERN_ERR "%s: failed to set 3p0 regulator voltage Err: %d\n",
+						__func__, ret);
+	}
+	ret = regulator_enable(vdd3p0_regulator);
+	if (ret) {
+		printk(KERN_ERR "%s: failed to enable 3p0 regulator Err: %d\n",
+						__func__, ret);
+	}
+
 	printk(KERN_INFO "PM driver module loaded\n");
 
 	return 0;
@@ -532,6 +570,7 @@ static void __exit pm_cleanup(void)
 {
 	/* Unregister the device structure */
 	platform_driver_unregister(&mx6_pm_driver);
+	regulator_put(vdd3p0_regulator);
 }
 
 module_init(pm_init);
diff --git a/arch/arm/plat-mxc/include/mach/mxc_vpu.h b/arch/arm/plat-mxc/include/mach/mxc_vpu.h
index 0c0fa2aad38b..7a6e24f2b0dd 100755
--- a/arch/arm/plat-mxc/include/mach/mxc_vpu.h
+++ b/arch/arm/plat-mxc/include/mach/mxc_vpu.h
@@ -67,6 +67,7 @@ struct vpu_mem_desc {
 #define BIT_INT_REASON			0x174
 
 #define MJPEG_PIC_STATUS_REG		0x3004
+#define MBC_SET_SUBBLK_EN		0x4A0
 
 #define BIT_WORK_CTRL_BUF_BASE		0x100
 #define BIT_WORK_CTRL_BUF_REG(i)	(BIT_WORK_CTRL_BUF_BASE + i * 4)
@@ -77,7 +78,11 @@ struct vpu_mem_desc {
 #define BIT_FRAME_MEM_CTRL		BIT_WORK_CTRL_BUF_REG(4)
 #define BIT_BIT_STREAM_PARAM		BIT_WORK_CTRL_BUF_REG(5)
 
+#ifndef CONFIG_ARCH_MX6
 #define BIT_RESET_CTRL			0x11C
+#else
+#define BIT_RESET_CTRL			0x128
+#endif
 
 /* i could be 0, 1, 2, 3 */
 #define	BIT_RD_PTR_BASE			0x120
diff --git a/drivers/dma/pxp/pxp_dma_v2.c b/drivers/dma/pxp/pxp_dma_v2.c
index b74f62cac032..c6098774ecf2 100644
--- a/drivers/dma/pxp/pxp_dma_v2.c
+++ b/drivers/dma/pxp/pxp_dma_v2.c
@@ -436,22 +436,27 @@ static void pxp_set_olparam(int layer_no, struct pxps *pxp)
 static void pxp_set_s0param(struct pxps *pxp)
 {
 	struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
-	struct pxp_layer_param *s0params_data = &pxp_conf->s0_param;
 	struct pxp_proc_data *proc_data = &pxp_conf->proc_data;
 	u32 s0param;
 
-	s0param = BF_PXP_OUT_PS_ULC_X(proc_data->srect.left);
-	s0param |= BF_PXP_OUT_PS_ULC_Y(proc_data->srect.top);
+	/* contains the coordinate for the PS in the OUTPUT buffer. */
+	s0param = BF_PXP_OUT_PS_ULC_X(proc_data->drect.left);
+	s0param |= BF_PXP_OUT_PS_ULC_Y(proc_data->drect.top);
 	__raw_writel(s0param, pxp->base + HW_PXP_OUT_PS_ULC);
-	s0param = BF_PXP_OUT_PS_LRC_X(s0params_data->width);
-	s0param |= BF_PXP_OUT_PS_LRC_Y(s0params_data->height);
+	s0param = BF_PXP_OUT_PS_LRC_X(proc_data->drect.left +
+					proc_data->drect.width - 1);
+	s0param |= BF_PXP_OUT_PS_LRC_Y(proc_data->drect.top +
+					proc_data->drect.height - 1);
 	__raw_writel(s0param, pxp->base + HW_PXP_OUT_PS_LRC);
-
 }
 
-/* TODO: crop behavior is re-designed in h/w. */
+/* crop behavior is re-designed in h/w. */
 static void pxp_set_s0crop(struct pxps *pxp)
 {
+	/*
+	 * place-holder, it's implemented in other functions in this driver.
+	 * Refer to "Clipping source images" section in RM for detail.
+	 */
 }
 
 static int pxp_set_scaling(struct pxps *pxp)
@@ -706,19 +711,36 @@ static void pxp_set_s0buf(struct pxps *pxp)
 {
 	struct pxp_config_data *pxp_conf = &pxp->pxp_conf_state;
 	struct pxp_layer_param *s0_params = &pxp_conf->s0_param;
+	struct pxp_proc_data *proc_data = &pxp_conf->proc_data;
 	dma_addr_t Y, U, V;
+	dma_addr_t Y1, U1, V1;
+	u32 offset, bpp = 1;
 
 	Y = s0_params->paddr;
-	__raw_writel(Y, pxp->base + HW_PXP_PS_BUF);
+
+	if (s0_params->pixel_fmt == PXP_PIX_FMT_RGB565)
+		bpp = 2;
+	else if (s0_params->pixel_fmt == PXP_PIX_FMT_RGB24)
+		bpp = 4;
+	offset = (proc_data->srect.top * s0_params->width +
+		 proc_data->srect.left) * bpp;
+	/* clipping or cropping */
+	Y1 = Y + offset;
+	__raw_writel(Y1, pxp->base + HW_PXP_PS_BUF);
 	if ((s0_params->pixel_fmt == PXP_PIX_FMT_YUV420P) ||
 	    (s0_params->pixel_fmt == PXP_PIX_FMT_YVU420P) ||
 	    (s0_params->pixel_fmt == PXP_PIX_FMT_GREY)) {
 		/* Set to 1 if YUV format is 4:2:2 rather than 4:2:0 */
 		int s = 2;
+
+		offset = proc_data->srect.top * s0_params->width / 4 +
+			 proc_data->srect.left / 2;
 		U = Y + (s0_params->width * s0_params->height);
+		U1 = U + offset;
 		V = U + ((s0_params->width * s0_params->height) >> s);
-		__raw_writel(U, pxp->base + HW_PXP_PS_UBUF);
-		__raw_writel(V, pxp->base + HW_PXP_PS_VBUF);
+		V1 = V + offset;
+		__raw_writel(U1, pxp->base + HW_PXP_PS_UBUF);
+		__raw_writel(V1, pxp->base + HW_PXP_PS_VBUF);
 	}
 
 	/* TODO: only support RGB565, Y8, Y4, YUV420 */
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index b9474aa7f043..b4dee9d5a055 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -563,41 +563,4 @@ config KEYBOARD_W90P910
 	  To compile this driver as a module, choose M here: the
 	  module will be called w90p910_keypad.
 
-config KEYBOARD_MXC
-	tristate "MXC Keypad Driver"
-	depends on ARCH_MXC
-	help
-	  This is the Keypad driver for the Freescale MXC application
-	  processors.
-
-config KEYBOARD_MXS
-	tristate "MXS keyboard"
-	depends on ARCH_MXS
-	help
-	  This is the Keypad driver for the Freescale mxs soc
-
-
-config KEYBOARD_MC9S08DZ60
-	tristate "mc9s08dz60 keyboard"
-	depends on MXC_PMIC_MC9S08DZ60
-	help
-	 -to be written-
-
-config KEYBOARD_MPR084
-	tristate "Freescale MPR084 Touch Keypad Driver"
-	depends on ARCH_MX37
-	help
-	  This is the Keypad driver for the Freescale Proximity Capacitive
-	  Touch Sensor controller chip.
-
-config KEYBOARD_MPR121
-	tristate "Freescale MPR121 Touch Keypad Driver"
-	depends on I2C
-	help
-	  Say Y here if you have the  touchkey Freescale Proximity Capacitive
-	  Touch Sensor controller chip in your system.
-
-	  If unsure, say N.
-
-	  To compile this driver as a module, choose M here
 endif
diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
index 6791e8b45289..ddde0fd476f7 100644
--- a/drivers/input/keyboard/Makefile
+++ b/drivers/input/keyboard/Makefile
@@ -51,9 +51,3 @@ obj-$(CONFIG_KEYBOARD_TNETV107X)	+= tnetv107x-keypad.o
 obj-$(CONFIG_KEYBOARD_TWL4030)		+= twl4030_keypad.o
 obj-$(CONFIG_KEYBOARD_XTKBD)		+= xtkbd.o
 obj-$(CONFIG_KEYBOARD_W90P910)		+= w90p910_keypad.o
-obj-$(CONFIG_KEYBOARD_MXC)		+= mxc_keyb.o
-obj-$(CONFIG_KEYBOARD_MXC)		+= mxc_pwrkey.o
-obj-$(CONFIG_KEYBOARD_MPR084)		+= mpr084.o
-obj-$(CONFIG_KEYBOARD_MXS)		+= mxs-kbd.o
-obj-$(CONFIG_KEYBOARD_MC9S08DZ60)	+= mc9s08dz60_keyb.o
-obj-$(CONFIG_KEYBOARD_MPR121)		+= mpr121.o
diff --git a/drivers/input/keyboard/mpr121.c b/drivers/input/keyboard/mpr121.c
deleted file mode 100644
index 7aae302758c5..000000000000
--- a/drivers/input/keyboard/mpr121.c
+++ /dev/null
@@ -1,308 +0,0 @@
-/*
- * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
-
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/*
- * mpr121.c - Touchkey driver for Freescale MPR121 Capacitive Touch
- * Sensor Controllor
- */
-
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/i2c.h>
-#include <linux/i2c/mpr.h>
-#include <linux/interrupt.h>
-#include <linux/input.h>
-#include <linux/irq.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/bitops.h>
-
-
-struct mpr121_touchkey_data {
-	struct i2c_client	*client;
-	struct input_dev	*input_dev;
-	unsigned int		key_val;
-	int			statusbits;
-	int			keycount;
-	u16			keycodes[MPR121_MAX_KEY_COUNT];
-};
-
-struct mpr121_init_register {
-	int addr;
-	u8 val;
-};
-
-static struct mpr121_init_register init_reg_table[] = {
-	{MHD_RISING_ADDR,	0x1},
-	{NHD_RISING_ADDR,	0x1},
-	{NCL_RISING_ADDR,	0x0},
-	{FDL_RISING_ADDR,	0x0},
-	{MHD_FALLING_ADDR,	0x1},
-	{NHD_FALLING_ADDR,	0x1},
-	{NCL_FALLING_ADDR,	0xff},
-	{FDL_FALLING_ADDR,	0x02},
-	{FILTER_CONF_ADDR,	0x04},
-	{AFE_CONF_ADDR,		0x0b},
-	{AUTO_CONFIG_CTRL_ADDR, 0x0b},
-};
-
-static irqreturn_t mpr_touchkey_interrupt(int irq, void *dev_id)
-{
-	struct mpr121_touchkey_data *data = dev_id;
-	struct i2c_client *client = data->client;
-	struct input_dev *input = data->input_dev;
-	unsigned int key_num, pressed;
-	int reg;
-
-	reg = i2c_smbus_read_byte_data(client, ELE_TOUCH_STATUS_1_ADDR);
-	if (reg < 0) {
-		dev_err(&client->dev, "i2c read error [%d]\n", reg);
-		goto out;
-	}
-
-	reg <<= 8;
-	reg |= i2c_smbus_read_byte_data(client, ELE_TOUCH_STATUS_0_ADDR);
-	if (reg < 0) {
-		dev_err(&client->dev, "i2c read error [%d]\n", reg);
-		goto out;
-	}
-
-	reg &= TOUCH_STATUS_MASK;
-	/* use old press bit to figure out which bit changed */
-	key_num = ffs(reg ^ data->statusbits) - 1;
-	/* use the bit check the press status */
-	pressed = (reg & (1 << (key_num))) >> key_num;
-	data->statusbits = reg;
-	data->key_val = data->keycodes[key_num];
-
-	input_event(input, EV_MSC, MSC_SCAN, data->key_val);
-	input_report_key(input, data->key_val, pressed);
-	input_sync(input);
-
-	dev_dbg(&client->dev, "key %d %d %s\n", key_num, data->key_val,
-		pressed ? "pressed" : "released");
-
-out:
-	return IRQ_HANDLED;
-}
-
-static int mpr121_phys_init(struct mpr121_platform_data *pdata,
-			    struct mpr121_touchkey_data *data,
-			    struct i2c_client *client)
-{
-	struct mpr121_init_register *reg;
-	unsigned char usl, lsl, tl;
-	int i, t, vdd, ret;
-
-	/* setup touch/release threshold for ele0-ele11 */
-	for (i = 0; i <= MPR121_MAX_KEY_COUNT; i++) {
-		t = ELE0_TOUCH_THRESHOLD_ADDR + (i * 2);
-		ret = i2c_smbus_write_byte_data(client, t, TOUCH_THRESHOLD);
-		if (ret < 0)
-			goto err_i2c_write;
-		ret = i2c_smbus_write_byte_data(client, t + 1,
-						RELEASE_THRESHOLD);
-		if (ret < 0)
-			goto err_i2c_write;
-	}
-	/* setup init register */
-	for (i = 0; i < ARRAY_SIZE(init_reg_table); i++) {
-		reg = &init_reg_table[i];
-		ret = i2c_smbus_write_byte_data(client, reg->addr, reg->val);
-		if (ret < 0)
-			goto err_i2c_write;
-	}
-	/* setup auto-register by vdd,the formula please ref:AN3889 */
-	vdd = pdata->vdd_uv / 1000;
-	usl = ((vdd - 700) * 256) / vdd;
-	lsl = (usl * 65) / 100;
-	tl = (usl * 90) / 100;
-	ret = i2c_smbus_write_byte_data(client, AUTO_CONFIG_USL_ADDR, usl);
-	if (ret < 0)
-		goto err_i2c_write;
-	ret = i2c_smbus_write_byte_data(client, AUTO_CONFIG_LSL_ADDR, lsl);
-	if (ret < 0)
-		goto err_i2c_write;
-	ret = i2c_smbus_write_byte_data(client, AUTO_CONFIG_TL_ADDR, tl);
-	if (ret < 0)
-		goto err_i2c_write;
-	ret = i2c_smbus_write_byte_data(client, ELECTRODE_CONF_ADDR,
-					data->keycount);
-	if (ret < 0)
-		goto err_i2c_write;
-
-	dev_info(&client->dev, "mpr121: config as enable %x of electrode.\n",
-		 data->keycount);
-
-	return 0;
-
-err_i2c_write:
-	dev_err(&client->dev, "i2c write error[%d]\n", ret);
-	return ret;
-}
-
-static int __devinit mpr_touchkey_probe(struct i2c_client *client,
-					const struct i2c_device_id *id)
-{
-	struct mpr121_platform_data *pdata;
-	struct mpr121_touchkey_data *data;
-	struct input_dev *input_dev;
-	int error;
-	int i;
-
-	pdata = client->dev.platform_data;
-	if (!pdata) {
-		dev_err(&client->dev, "no platform data defined\n");
-		return -EINVAL;
-	}
-
-	data = kzalloc(sizeof(struct mpr121_touchkey_data), GFP_KERNEL);
-	input_dev = input_allocate_device();
-	if (!data || !input_dev) {
-		dev_err(&client->dev, "Falied to allocate memory\n");
-		error = -ENOMEM;
-		goto err_free_mem;
-	}
-
-	data->client = client;
-	data->input_dev = input_dev;
-	data->keycount = pdata->keycount;
-
-	if (data->keycount > MPR121_MAX_KEY_COUNT) {
-		dev_err(&client->dev, "Too many key defined\n");
-		error = -EINVAL;
-		goto err_free_mem;
-	}
-
-	error = mpr121_phys_init(pdata, data, client);
-	if (error < 0) {
-		dev_err(&client->dev, "Failed to init register\n");
-		goto err_free_mem;
-	}
-
-	i2c_set_clientdata(client, data);
-
-	input_dev->name = "FSL MPR121 Touchkey";
-	input_dev->id.bustype = BUS_I2C;
-	input_dev->dev.parent = &client->dev;
-	input_dev->keycode = pdata->matrix;
-	input_dev->keycodesize = sizeof(pdata->matrix[0]);
-	input_dev->keycodemax = data->keycount;
-
-	for (i = 0; i < input_dev->keycodemax; i++) {
-		__set_bit(pdata->matrix[i], input_dev->keybit);
-		data->keycodes[i] = pdata->matrix[i];
-	}
-
-	input_set_capability(input_dev, EV_MSC, MSC_SCAN);
-	input_set_drvdata(input_dev, data);
-
-	error = request_threaded_irq(client->irq, NULL,
-				     mpr_touchkey_interrupt,
-				     IRQF_TRIGGER_FALLING,
-				     client->dev.driver->name, data);
-	if (error) {
-		dev_err(&client->dev, "Failed to register interrupt\n");
-		goto err_free_mem;
-	}
-
-	error = input_register_device(input_dev);
-	if (error)
-		goto err_free_irq;
-	i2c_set_clientdata(client, data);
-	device_init_wakeup(&client->dev, pdata->wakeup);
-	dev_info(&client->dev, "Mpr121 touch keyboard init success.\n");
-	return 0;
-
-err_free_irq:
-	free_irq(client->irq, data);
-err_free_mem:
-	input_free_device(input_dev);
-	kfree(data);
-	return error;
-}
-
-static int __devexit mpr_touchkey_remove(struct i2c_client *client)
-{
-	struct mpr121_touchkey_data *data = i2c_get_clientdata(client);
-
-	free_irq(client->irq, data);
-	input_unregister_device(data->input_dev);
-	kfree(data);
-
-	return 0;
-}
-
-#ifdef CONFIG_PM
-static int mpr_suspend(struct i2c_client *client, pm_message_t mesg)
-{
-	if (device_may_wakeup(&client->dev))
-		enable_irq_wake(client->irq);
-
-	i2c_smbus_write_byte_data(client, ELECTRODE_CONF_ADDR, 0x00);
-
-	return 0;
-}
-
-static int mpr_resume(struct i2c_client *client)
-{
-	struct mpr121_touchkey_data *data = i2c_get_clientdata(client);
-
-	if (device_may_wakeup(&client->dev))
-		disable_irq_wake(client->irq);
-
-	i2c_smbus_write_byte_data(client, ELECTRODE_CONF_ADDR, data->keycount);
-
-	return 0;
-}
-#else
-static int mpr_suspend(struct i2c_client *client, pm_message_t mesg) {}
-static int mpr_resume(struct i2c_client *client) {}
-#endif
-
-static const struct i2c_device_id mpr121_id[] = {
-	{"mpr121_touchkey", 0},
-	{ }
-};
-
-static struct i2c_driver mpr_touchkey_driver = {
-	.driver = {
-		.name = "mpr121",
-		.owner = THIS_MODULE,
-	},
-	.id_table = mpr121_id,
-	.probe	= mpr_touchkey_probe,
-	.remove = __devexit_p(mpr_touchkey_remove),
-	.suspend = mpr_suspend,
-	.resume = mpr_resume,
-};
-
-static int __init mpr_touchkey_init(void)
-{
-	return i2c_add_driver(&mpr_touchkey_driver);
-}
-
-static void __exit mpr_touchkey_exit(void)
-{
-	i2c_del_driver(&mpr_touchkey_driver);
-}
-
-module_init(mpr_touchkey_init);
-module_exit(mpr_touchkey_exit);
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Freescale Semiconductor, Inc.");
-MODULE_DESCRIPTION("Touch Key driver for FSL MPR121 Chip");
diff --git a/drivers/input/touchscreen/elan_ts.c b/drivers/input/touchscreen/elan_ts.c
index 7edd87d6cd1b..90272594d120 100644
--- a/drivers/input/touchscreen/elan_ts.c
+++ b/drivers/input/touchscreen/elan_ts.c
@@ -359,6 +359,33 @@ static const struct i2c_device_id elan_touch_id[] = {
 	{}
 };
 
+static int elan_suspend(struct device *dev)
+{
+	return 0;
+}
+
+static int elan_resume(struct device *dev)
+{
+	uint8_t buf[IDX_PACKET_SIZE] = { 0 };
+
+	if (0 == elan_touch_detect_int_level()) {
+		dev_dbg(dev, "Got touch during suspend period.\n");
+		/*
+		 * if touch screen during suspend, recv and drop the
+		 * data, then touch interrupt pin will return high after
+		 * receving data.
+		 */
+		elan_touch_recv_data(elan_touch_data.client, buf);
+	}
+
+	return 0;
+}
+
+static const struct dev_pm_ops elan_dev_pm_ops = {
+	.suspend = elan_suspend,
+	.resume  = elan_resume,
+};
+
 static struct i2c_driver elan_touch_driver = {
 	.probe = elan_touch_probe,
 	.remove = elan_touch_remove,
@@ -366,6 +393,9 @@ static struct i2c_driver elan_touch_driver = {
 	.driver = {
 		   .name = "elan-touch",
 		   .owner = THIS_MODULE,
+#ifdef CONFIG_PM
+		   .pm = &elan_dev_pm_ops,
+#endif
 		   },
 };
 
diff --git a/drivers/media/video/mxc/capture/csi_v4l2_capture.c b/drivers/media/video/mxc/capture/csi_v4l2_capture.c
index a0887b930ea4..3756b00a844d 100644
--- a/drivers/media/video/mxc/capture/csi_v4l2_capture.c
+++ b/drivers/media/video/mxc/capture/csi_v4l2_capture.c
@@ -1142,6 +1142,7 @@ static long csi_v4l_do_ioctl(struct file *file,
 			strcpy(cap->driver, "csi_v4l2");
 			cap->version = KERNEL_VERSION(0, 1, 11);
 			cap->capabilities = V4L2_CAP_VIDEO_OVERLAY |
+			    V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
 			    V4L2_CAP_VIDEO_OUTPUT_OVERLAY | V4L2_CAP_READWRITE;
 			cap->card[0] = '\0';
 			cap->bus_info[0] = '\0';
@@ -1536,7 +1537,8 @@ static int csi_v4l2_suspend(struct platform_device *pdev, pm_message_t state)
 	if (cam->overlay_on == true)
 		stop_preview(cam);
 
-	camera_power(cam, false);
+	if (cam->capture_on == true || cam->overlay_on == true)
+		camera_power(cam, false);
 
 	return 0;
 }
@@ -1561,7 +1563,8 @@ static int csi_v4l2_resume(struct platform_device *pdev)
 
 	cam->low_power = false;
 	wake_up_interruptible(&cam->power_queue);
-	camera_power(cam, true);
+	if (cam->capture_on == true || cam->overlay_on == true)
+		camera_power(cam, true);
 
 	if (cam->overlay_on == true)
 		start_preview(cam);
diff --git a/drivers/media/video/mxc/capture/fsl_csi.c b/drivers/media/video/mxc/capture/fsl_csi.c
index 33a82242e95e..f5677e473e87 100644
--- a/drivers/media/video/mxc/capture/fsl_csi.c
+++ b/drivers/media/video/mxc/capture/fsl_csi.c
@@ -250,12 +250,14 @@ static void csi_mclk_recalc(struct clk *clk)
 
 void csi_mclk_enable(void)
 {
+	clk_enable(&csi_mclk);
 	__raw_writel(__raw_readl(CSI_CSICR1) | BIT_MCLKEN, CSI_CSICR1);
 }
 
 void csi_mclk_disable(void)
 {
 	__raw_writel(__raw_readl(CSI_CSICR1) & ~BIT_MCLKEN, CSI_CSICR1);
+	clk_disable(&csi_mclk);
 }
 
 static int __devinit csi_probe(struct platform_device *pdev)
@@ -293,8 +295,13 @@ static int __devinit csi_probe(struct platform_device *pdev)
 		return PTR_ERR(per_clk);
 
 	clk_put(per_clk);
+	/*
+	 * On mx6sl, there's no divider in CSI module(BIT_MCLKDIV in CSI_CSICR1
+	 * is marked as reserved). We use CSI clock in CCM.
+	 * However, the value read from BIT_MCLKDIV bits are 0, which is
+	 * equivalent to "divider=1". The code works for mx6sl without change.
+	 */
 	csi_mclk.parent = per_clk;
-	clk_enable(per_clk);
 	csi_mclk_recalc(&csi_mclk);
 
 err:
@@ -303,7 +310,6 @@ err:
 
 static int __devexit csi_remove(struct platform_device *pdev)
 {
-	clk_disable(&csi_mclk);
 	iounmap(csi_regbase);
 
 	return 0;
diff --git a/drivers/media/video/mxc/output/mxc_pxp_v4l2.c b/drivers/media/video/mxc/output/mxc_pxp_v4l2.c
index a3a8294efb8e..08d16b9f75d3 100644
--- a/drivers/media/video/mxc/output/mxc_pxp_v4l2.c
+++ b/drivers/media/video/mxc/output/mxc_pxp_v4l2.c
@@ -54,6 +54,7 @@
 
 #define V4L2_OUTPUT_TYPE_INTERNAL	4
 
+static int video_nr = -1;	/* -1 ==> auto assign */
 static struct pxp_data_format pxp_s0_formats[] = {
 	{
 		.name = "24-bit RGB",
@@ -395,7 +396,12 @@ static int pxp_s_output(struct file *file, void *fh,
 		bpp = 2;
 
 	pxp->outb_size = fmt->width * fmt->height * bpp;
-	pxp->outb = kmalloc(fmt->width * fmt->height * bpp, GFP_KERNEL);
+	pxp->outb = kmalloc(fmt->width * fmt->height * bpp,
+				GFP_KERNEL | GFP_DMA);
+	if (pxp->outb == NULL) {
+		dev_err(&pxp->pdev->dev, "No enough memory!\n");
+		return -ENOMEM;
+	}
 	pxp->outb_phys = virt_to_phys(pxp->outb);
 	dma_map_single(NULL, pxp->outb,
 			fmt->width * fmt->height * bpp, DMA_TO_DEVICE);
@@ -1175,7 +1181,7 @@ static int pxp_probe(struct platform_device *pdev)
 	memcpy(pxp->vdev, &pxp_template, sizeof(pxp_template));
 	video_set_drvdata(pxp->vdev, pxp);
 
-	err = video_register_device(pxp->vdev, VFL_TYPE_GRABBER, 0);
+	err = video_register_device(pxp->vdev, VFL_TYPE_GRABBER, video_nr);
 	if (err) {
 		dev_err(&pdev->dev, "failed to register video device\n");
 		goto freevdev;
@@ -1235,6 +1241,7 @@ static void __exit pxp_exit(void)
 module_init(pxp_init);
 module_exit(pxp_exit);
 
+module_param(video_nr, int, 0444);
 MODULE_DESCRIPTION("MXC PxP V4L2 driver");
 MODULE_AUTHOR("Freescale Semiconductor, Inc.");
 MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/mxc-hdmi-core.c b/drivers/mfd/mxc-hdmi-core.c
index e9322477ff6d..6cb36eedba19 100644
--- a/drivers/mfd/mxc-hdmi-core.c
+++ b/drivers/mfd/mxc-hdmi-core.c
@@ -79,6 +79,7 @@ unsigned int hdmi_set_cable_state(unsigned int state)
 
 	return 0;
 }
+EXPORT_SYMBOL(hdmi_set_cable_state);
 
 unsigned int hdmi_set_blank_state(unsigned int state)
 {
@@ -90,6 +91,7 @@ unsigned int hdmi_set_blank_state(unsigned int state)
 
 	return 0;
 }
+EXPORT_SYMBOL(hdmi_set_blank_state);
 
 static void hdmi_audio_abort_stream(struct snd_pcm_substream *substream)
 {
@@ -113,6 +115,7 @@ int mxc_hdmi_abort_stream(void)
 
 	return 0;
 }
+EXPORT_SYMBOL(mxc_hdmi_abort_stream);
 
 static int check_hdmi_state(void)
 {
@@ -129,6 +132,7 @@ static int check_hdmi_state(void)
 
 	return ret;
 }
+EXPORT_SYMBOL(check_hdmi_state);
 
 int mxc_hdmi_register_audio(struct snd_pcm_substream *substream)
 {
@@ -152,6 +156,7 @@ int mxc_hdmi_register_audio(struct snd_pcm_substream *substream)
 
 	return ret;
 }
+EXPORT_SYMBOL(mxc_hdmi_register_audio);
 
 void mxc_hdmi_unregister_audio(struct snd_pcm_substream *substream)
 {
@@ -161,6 +166,7 @@ void mxc_hdmi_unregister_audio(struct snd_pcm_substream *substream)
 	hdmi_audio_stream_playback = NULL;
 	spin_unlock_irqrestore(&hdmi_audio_lock, flags);
 }
+EXPORT_SYMBOL(mxc_hdmi_unregister_audio);
 
 u8 hdmi_readb(unsigned int reg)
 {
@@ -172,6 +178,7 @@ u8 hdmi_readb(unsigned int reg)
 
 	return value;
 }
+EXPORT_SYMBOL(hdmi_readb);
 
 #ifdef DEBUG
 static bool overflow_lo;
@@ -200,6 +207,7 @@ bool hdmi_check_overflow(void)
 	return false;
 }
 #endif
+EXPORT_SYMBOL(hdmi_check_overflow);
 
 void hdmi_writeb(u8 value, unsigned int reg)
 {
@@ -208,6 +216,7 @@ void hdmi_writeb(u8 value, unsigned int reg)
 	__raw_writeb(value, hdmi_base + reg);
 	hdmi_check_overflow();
 }
+EXPORT_SYMBOL(hdmi_writeb);
 
 void hdmi_mask_writeb(u8 data, unsigned int reg, u8 shift, u8 mask)
 {
@@ -215,6 +224,7 @@ void hdmi_mask_writeb(u8 data, unsigned int reg, u8 shift, u8 mask)
 	value |= (data << shift) & mask;
 	hdmi_writeb(value, reg);
 }
+EXPORT_SYMBOL(hdmi_mask_writeb);
 
 unsigned int hdmi_read4(unsigned int reg)
 {
@@ -224,6 +234,7 @@ unsigned int hdmi_read4(unsigned int reg)
 		(hdmi_readb(reg + 1) << 8) |
 		hdmi_readb(reg);
 }
+EXPORT_SYMBOL(hdmi_read4);
 
 void hdmi_write4(unsigned int value, unsigned int reg)
 {
@@ -233,6 +244,7 @@ void hdmi_write4(unsigned int value, unsigned int reg)
 	hdmi_writeb((value >> 16) & 0xff, reg + 2);
 	hdmi_writeb((value >> 24) & 0xff, reg + 3);
 }
+EXPORT_SYMBOL(hdmi_write4);
 
 static void initialize_hdmi_ih_mutes(void)
 {
@@ -501,6 +513,7 @@ unsigned int hdmi_SDMA_check(void)
 	return (mx6q_revision() > IMX_CHIP_REVISION_1_1) ||
 			(mx6dl_revision() > IMX_CHIP_REVISION_1_0);
 }
+EXPORT_SYMBOL(hdmi_SDMA_check);
 
 /* Need to run this before phy is enabled the first time to prevent
  * overflow condition in HDMI_IH_FC_STAT2 */
@@ -511,6 +524,7 @@ void hdmi_init_clk_regenerator(void)
 		hdmi_set_clk_regenerator();
 	}
 }
+EXPORT_SYMBOL(hdmi_init_clk_regenerator);
 
 void hdmi_clk_regenerator_update_pixel_clock(u32 pixclock)
 {
@@ -519,17 +533,20 @@ void hdmi_clk_regenerator_update_pixel_clock(u32 pixclock)
 	pixel_clk_rate = PICOS2KHZ(pixclock) * 1000UL;
 	hdmi_set_clk_regenerator();
 }
+EXPORT_SYMBOL(hdmi_clk_regenerator_update_pixel_clock);
 
 void hdmi_set_dma_mode(unsigned int dma_running)
 {
 	hdmi_dma_running = dma_running;
 	hdmi_set_clk_regenerator();
 }
+EXPORT_SYMBOL(hdmi_set_dma_mode);
 
 void hdmi_set_sample_rate(unsigned int rate)
 {
 	sample_rate = rate;
 }
+EXPORT_SYMBOL(hdmi_set_sample_rate);
 
 void hdmi_set_edid_cfg(struct mxc_edid_cfg *cfg)
 {
@@ -539,6 +556,7 @@ void hdmi_set_edid_cfg(struct mxc_edid_cfg *cfg)
 	memcpy(&hdmi_core_edid_cfg, cfg, sizeof(struct mxc_edid_cfg));
 	spin_unlock_irqrestore(&edid_spinlock, flags);
 }
+EXPORT_SYMBOL(hdmi_set_edid_cfg);
 
 void hdmi_get_edid_cfg(struct mxc_edid_cfg *cfg)
 {
@@ -548,16 +566,19 @@ void hdmi_get_edid_cfg(struct mxc_edid_cfg *cfg)
 	memcpy(cfg, &hdmi_core_edid_cfg, sizeof(struct mxc_edid_cfg));
 	spin_unlock_irqrestore(&edid_spinlock, flags);
 }
+EXPORT_SYMBOL(hdmi_get_edid_cfg);
 
 void hdmi_set_registered(int registered)
 {
 	hdmi_core_init = registered;
 }
+EXPORT_SYMBOL(hdmi_set_registered);
 
 int hdmi_get_registered(void)
 {
 	return hdmi_core_init;
 }
+EXPORT_SYMBOL(hdmi_get_registered);
 
 static int mxc_hdmi_core_probe(struct platform_device *pdev)
 {
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 3dea9b5b29ff..062a6c319695 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -841,12 +841,18 @@ static int esdhc_pltfm_init(struct sdhci_host *host, struct sdhci_pltfm_data *pd
 			MMC_VDD_32_33 | MMC_VDD_33_34;
 	host->ocr_avail_mmc = MMC_VDD_29_30 | MMC_VDD_30_31 | \
 			MMC_VDD_32_33 | MMC_VDD_33_34;
+	host->ocr_avail_sdio = MMC_VDD_29_30 | MMC_VDD_30_31 | \
+			MMC_VDD_32_33 | MMC_VDD_33_34;
 
 	if (cpu_is_mx6q() || cpu_is_mx6dl())
 		sdhci_esdhc_ops.platform_execute_tuning = esdhc_execute_tuning;
 
-	if (boarddata->support_18v)
+	if (boarddata->support_18v) {
 		host->ocr_avail_sd |= MMC_VDD_165_195;
+		host->ocr_avail_mmc |= MMC_VDD_165_195;
+		host->ocr_avail_sdio |= MMC_VDD_165_195;
+	}
+
 	if (boarddata->support_8bit)
 		host->mmc->caps |= MMC_CAP_8_BIT_DATA;
 	if (boarddata->keep_power_at_suspend)
diff --git a/drivers/mtd/cmdlinepart.c b/drivers/mtd/cmdlinepart.c
index fe33da403ab9..27d9dcc578a8 100644
--- a/drivers/mtd/cmdlinepart.c
+++ b/drivers/mtd/cmdlinepart.c
@@ -56,8 +56,8 @@
 
 
 /* special size referring to all the remaining space in a partition */
-#define SIZE_REMAINING UINT_MAX
-#define OFFSET_CONTINUOUS UINT_MAX
+#define SIZE_REMAINING ULLONG_MAX
+#define OFFSET_CONTINUOUS ULLONG_MAX
 
 struct cmdline_mtd_partition {
 	struct cmdline_mtd_partition *next;
@@ -89,8 +89,8 @@ static struct mtd_partition * newpart(char *s,
                                       int extra_mem_size)
 {
 	struct mtd_partition *parts;
-	unsigned long size;
-	unsigned long offset = OFFSET_CONTINUOUS;
+	unsigned long long size;
+	unsigned long long offset = OFFSET_CONTINUOUS;
 	char *name;
 	int name_len;
 	unsigned char *extra_mem;
@@ -108,7 +108,7 @@ static struct mtd_partition * newpart(char *s,
 		size = memparse(s, &s);
 		if (size < PAGE_SIZE)
 		{
-			printk(KERN_ERR ERRP "partition size too small (%lx)\n", size);
+			printk(KERN_ERR ERRP "partition size too small (%llx)\n", size);
 			return NULL;
 		}
 	}
@@ -319,7 +319,7 @@ static int parse_cmdline_partitions(struct mtd_info *master,
 				    struct mtd_partition **pparts,
 				    struct mtd_part_parser_data *data)
 {
-	unsigned long offset;
+	unsigned long long offset;
 	int i;
 	struct cmdline_mtd_partition *part;
 	const char *mtd_id = master->name;
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 6367eac4461b..d3b791f81dfd 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2855,7 +2855,7 @@ static u16 onfi_crc16(u16 crc, u8 const *p, size_t len)
  * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise
  */
 static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
-					int busw)
+					int *busw)
 {
 	struct nand_onfi_params *p = &chip->onfi_params;
 	int i;
@@ -2909,10 +2909,11 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
 	mtd->writesize = le32_to_cpu(p->byte_per_page);
 	mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
 	mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
-	chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize;
-	busw = 0;
+	chip->chipsize = le32_to_cpu(p->blocks_per_lun);
+	chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
+	*busw = 0;
 	if (le16_to_cpu(p->features) & 1)
-		busw = NAND_BUSWIDTH_16;
+		*busw = NAND_BUSWIDTH_16;
 
 	chip->options &= ~NAND_CHIPOPTIONS_MSK;
 	chip->options |= (NAND_NO_READRDY |
@@ -2978,7 +2979,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 	chip->onfi_version = 0;
 	if (!type->name || !type->pagesize) {
 		/* Check is chip is ONFI compliant */
-		ret = nand_flash_detect_onfi(mtd, chip, busw);
+		ret = nand_flash_detect_onfi(mtd, chip, &busw);
 		if (ret)
 			goto ident_done;
 	}
diff --git a/drivers/mxc/ipu3/ipu_ic.c b/drivers/mxc/ipu3/ipu_ic.c
index 84dcbb145f6f..b0b79add39a6 100644
--- a/drivers/mxc/ipu3/ipu_ic.c
+++ b/drivers/mxc/ipu3/ipu_ic.c
@@ -240,7 +240,9 @@ void _ipu_ic_init_prpvf(struct ipu_soc *ipu, ipu_channel_params_t *params, bool
 	ipu_color_space_t in_fmt, out_fmt;
 
 	/* Setup vertical resizing */
-	if (!(params->mem_prp_vf_mem.outv_resize_ratio)) {
+	if (!(params->mem_prp_vf_mem.outv_resize_ratio) ||
+		(params->mem_prp_vf_mem.outv_resize_ratio >=
+						IC_RSZ_MAX_RESIZE_RATIO)) {
 		_calc_resize_coeffs(ipu, params->mem_prp_vf_mem.in_height,
 				params->mem_prp_vf_mem.out_height,
 				&resizeCoeff, &downsizeCoeff);
@@ -250,7 +252,9 @@ void _ipu_ic_init_prpvf(struct ipu_soc *ipu, ipu_channel_params_t *params, bool
 
 	/* Setup horizontal resizing */
 	/* Upadeted for IC split case */
-	if (!(params->mem_prp_vf_mem.outh_resize_ratio)) {
+	if (!(params->mem_prp_vf_mem.outh_resize_ratio) ||
+		(params->mem_prp_vf_mem.outh_resize_ratio >=
+						IC_RSZ_MAX_RESIZE_RATIO)) {
 		_calc_resize_coeffs(ipu, params->mem_prp_vf_mem.in_width,
 				params->mem_prp_vf_mem.out_width,
 				&resizeCoeff, &downsizeCoeff);
@@ -365,7 +369,9 @@ void _ipu_ic_init_prpenc(struct ipu_soc *ipu, ipu_channel_params_t *params, bool
 	ipu_color_space_t in_fmt, out_fmt;
 
 	/* Setup vertical resizing */
-	if (!(params->mem_prp_enc_mem.outv_resize_ratio)) {
+	if (!(params->mem_prp_enc_mem.outv_resize_ratio) ||
+		(params->mem_prp_enc_mem.outv_resize_ratio >=
+						IC_RSZ_MAX_RESIZE_RATIO)) {
 		_calc_resize_coeffs(ipu, params->mem_prp_enc_mem.in_height,
 				params->mem_prp_enc_mem.out_height,
 				&resizeCoeff, &downsizeCoeff);
@@ -375,7 +381,9 @@ void _ipu_ic_init_prpenc(struct ipu_soc *ipu, ipu_channel_params_t *params, bool
 
 	/* Setup horizontal resizing */
 	/* Upadeted for IC split case */
-	if (!(params->mem_prp_enc_mem.outh_resize_ratio)) {
+	if (!(params->mem_prp_enc_mem.outh_resize_ratio) ||
+		(params->mem_prp_enc_mem.outh_resize_ratio >=
+						IC_RSZ_MAX_RESIZE_RATIO)) {
 		_calc_resize_coeffs(ipu, params->mem_prp_enc_mem.in_width,
 				params->mem_prp_enc_mem.out_width,
 				&resizeCoeff, &downsizeCoeff);
@@ -444,7 +452,9 @@ void _ipu_ic_init_pp(struct ipu_soc *ipu, ipu_channel_params_t *params)
 	ipu_color_space_t in_fmt, out_fmt;
 
 	/* Setup vertical resizing */
-	if (!(params->mem_pp_mem.outv_resize_ratio)) {
+	if (!(params->mem_pp_mem.outv_resize_ratio) ||
+		(params->mem_pp_mem.outv_resize_ratio >=
+						IC_RSZ_MAX_RESIZE_RATIO)) {
 		_calc_resize_coeffs(ipu, params->mem_pp_mem.in_height,
 			    params->mem_pp_mem.out_height,
 			    &resizeCoeff, &downsizeCoeff);
@@ -455,7 +465,9 @@ void _ipu_ic_init_pp(struct ipu_soc *ipu, ipu_channel_params_t *params)
 
 	/* Setup horizontal resizing */
 	/* Upadeted for IC split case */
-	if (!(params->mem_pp_mem.outh_resize_ratio)) {
+	if (!(params->mem_pp_mem.outh_resize_ratio) ||
+		(params->mem_pp_mem.outh_resize_ratio >=
+						IC_RSZ_MAX_RESIZE_RATIO)) {
 		_calc_resize_coeffs(ipu, params->mem_pp_mem.in_width,
 							params->mem_pp_mem.out_width,
 							&resizeCoeff, &downsizeCoeff);
diff --git a/drivers/mxc/ipu3/ipu_regs.h b/drivers/mxc/ipu3/ipu_regs.h
index f6dff36210f5..458b0e09115d 100644
--- a/drivers/mxc/ipu3/ipu_regs.h
+++ b/drivers/mxc/ipu3/ipu_regs.h
@@ -459,6 +459,8 @@ enum {
 	IC_CONF_RWS_EN = 0x40000000,
 	IC_CONF_CSI_MEM_WR_EN = 0x80000000,
 
+	IC_RSZ_MAX_RESIZE_RATIO = 0x00004000,
+
 	IC_IDMAC_1_CB0_BURST_16 = 0x00000001,
 	IC_IDMAC_1_CB1_BURST_16 = 0x00000002,
 	IC_IDMAC_1_CB2_BURST_16 = 0x00000004,
diff --git a/drivers/regulator/pfuze-regulator.h b/drivers/regulator/pfuze-regulator.h
index 20d4766e91ea..113355ca250f 100644
--- a/drivers/regulator/pfuze-regulator.h
+++ b/drivers/regulator/pfuze-regulator.h
@@ -23,9 +23,13 @@
 struct pfuze_regulator {
 	struct regulator_desc desc;
 	unsigned int reg;
+	unsigned int stby_reg;
 	unsigned char enable_bit;
+	unsigned char stby_bit;
 	unsigned char vsel_shift;
 	unsigned char vsel_mask;
+	unsigned char stby_vsel_shift;
+	unsigned char stby_vsel_mask;
 	int const *voltages;
 };
 
@@ -47,6 +51,7 @@ struct pfuze_regulator_priv {
 		},							\
 		.reg = prefix ## _reg,				\
 		.enable_bit = prefix ## _reg ## _ ## EN,	\
+		.stby_bit = prefix ## _reg ## _ ## STBY,	\
 		.vsel_shift = prefix ## _reg ## _ ## VSEL,\
 		.vsel_mask = prefix ## _reg ## _ ## VSEL_M,\
 		.voltages =  _voltages,					\
@@ -64,6 +69,25 @@ struct pfuze_regulator_priv {
 		.reg = prefix ## _reg,				\
 		.vsel_shift = prefix ## _reg ## _ ## VSEL,\
 		.vsel_mask = prefix ## _reg ## _ ## VSEL_M,\
+		.stby_reg = prefix ## _reg ## _ ## STBY,		\
+		.stby_vsel_shift = prefix ## _reg ## _ ## STBY_VSEL,\
+		.stby_vsel_mask = prefix ## _reg ## _ ## STBY_VSEL_M,\
+		.voltages =  _voltages,					\
+	}
+
+#define PFUZE_SWBST_DEFINE(prefix, _name, _reg, _voltages, _ops)	\
+	[prefix ## _name] = {				\
+		.desc = {						\
+			.name = #prefix "_" #_name,			\
+			.n_voltages = ARRAY_SIZE(_voltages),		\
+			.ops = &_ops,			\
+			.type = REGULATOR_VOLTAGE,			\
+			.id = prefix ## _name,		\
+			.owner = THIS_MODULE,				\
+		},							\
+		.reg = prefix ## _reg,				\
+		.vsel_shift = prefix ## _reg ## _ ## VSEL,\
+		.vsel_mask = prefix ## _reg ## _ ## VSEL_M,\
 		.voltages =  _voltages,					\
 	}
 
diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
index 34ca0fb45961..17a8da1e2099 100644
--- a/drivers/regulator/pfuze100-regulator.c
+++ b/drivers/regulator/pfuze100-regulator.c
@@ -159,6 +159,10 @@ static struct regulator_ops pfuze100_sw_regulator_ops;
 	PFUZE_SW_DEFINE(PFUZE100_, name, reg, voltages,	\
 			pfuze100_sw_regulator_ops)
 
+#define PFUZE100_SWBST_DEFINE(name, reg, voltages)	\
+	PFUZE_SWBST_DEFINE(PFUZE100_, name, reg, voltages,	\
+			pfuze100_sw_regulator_ops)
+
 #define PFUZE100_VGEN_DEFINE(name, reg, voltages)	\
 	PFUZE_DEFINE(PFUZE100_, name, reg, voltages,	\
 			pfuze100_ldo_regulator_ops)
@@ -167,6 +171,10 @@ static struct regulator_ops pfuze100_sw_regulator_ops;
 #define PFUZE100_SW1AVOL_VSEL	0
 #define PFUZE100_SW1AVOL_VSEL_M	(0x3f<<0)
 
+#define PFUZE100_SW1AVOL_STBY	33
+#define PFUZE100_SW1AVOL_STBY_VSEL	0
+#define PFUZE100_SW1AVOL_STBY_VSEL_M	(0x3f<<0)
+
 #define PFUZE100_SW1AOFF	34
 #define PFUZE100_SW1AOFF_OFF_VAL	(0x0<<0)
 #define PFUZE100_SW1AOFF_OFF_M	(0x3f<<0)
@@ -192,6 +200,10 @@ static struct regulator_ops pfuze100_sw_regulator_ops;
 #define PFUZE100_SW1BVOL_VSEL	0
 #define PFUZE100_SW1BVOL_VSEL_M	(0x3f<<0)
 
+#define PFUZE100_SW1BVOL_STBY	40
+#define PFUZE100_SW1BVOL_STBY_VSEL	0
+#define PFUZE100_SW1BVOL_STBY_VSEL_M	(0x3f<<0)
+
 #define PFUZE100_SW1BOFF	41
 #define PFUZE100_SW1BOFF_OFF_VAL	0x0
 #define PFUZE100_SW1BOFF_OFF_M	(0x3f<<0)
@@ -217,6 +229,10 @@ static struct regulator_ops pfuze100_sw_regulator_ops;
 #define PFUZE100_SW1CVOL_VSEL	0
 #define PFUZE100_SW1CVOL_VSEL_M	(0x3f<<0)
 
+#define PFUZE100_SW1CVOL_STBY	47
+#define PFUZE100_SW1CVOL_STBY_VSEL	0
+#define PFUZE100_SW1CVOL_STBY_VSEL_M	(0x3f<<0)
+
 #define PFUZE100_SW1COFF	48
 #define PFUZE100_SW1COFF_OFF_VAL	0x0
 #define PFUZE100_SW1COFF_OFF_M	(0x3f<<0)
@@ -242,6 +258,10 @@ static struct regulator_ops pfuze100_sw_regulator_ops;
 #define PFUZE100_SW2VOL_VSEL	0
 #define PFUZE100_SW2VOL_VSEL_M	(0x3f<<0)
 
+#define PFUZE100_SW2VOL_STBY		54
+#define PFUZE100_SW2VOL_STBY_VSEL	0
+#define PFUZE100_SW2VOL_STBY_VSEL_M	(0x3f<<0)
+
 #define PFUZE100_SW2OFF	55
 #define PFUZE100_SW2OFF_OFF_VAL	0x0
 #define PFUZE100_SW2OFF_OFF_M	(0x7f<<0)
@@ -267,6 +287,10 @@ static struct regulator_ops pfuze100_sw_regulator_ops;
 #define PFUZE100_SW3AVOL_VSEL	0
 #define PFUZE100_SW3AVOL_VSEL_M	(0x3f<<0)
 
+#define PFUZE100_SW3AVOL_STBY	61
+#define PFUZE100_SW3AVOL_STBY_VSEL	0
+#define PFUZE100_SW3AVOL_STBY_VSEL_M	(0x3f<<0)
+
 #define PFUZE100_SW3AOFF	62
 #define PFUZE100_SW3AOFF_OFF_VAL	0x0
 #define PFUZE100_SW3AOFF_OFF_M	(0x3f<<0)
@@ -292,6 +316,10 @@ static struct regulator_ops pfuze100_sw_regulator_ops;
 #define PFUZE100_SW3BVOL_VSEL	0
 #define PFUZE100_SW3BVOL_VSEL_M	(0x3f<<0)
 
+#define PFUZE100_SW3BVOL_STBY	68
+#define PFUZE100_SW3BVOL_STBY_VSEL	0
+#define PFUZE100_SW3BVOL_STBY_VSEL_M	(0x3f<<0)
+
 #define PFUZE100_SW3BOFF	69
 #define PFUZE100_SW3BOFF_OFF_VAL	0x0
 #define PFUZE100_SW3BOFF_OFF_M	(0x3f<<0)
@@ -317,6 +345,10 @@ static struct regulator_ops pfuze100_sw_regulator_ops;
 #define PFUZE100_SW4VOL_VSEL	0
 #define PFUZE100_SW4VOL_VSEL_M	(0x3f<<0)
 
+#define PFUZE100_SW4VOL_STBY		75
+#define PFUZE100_SW4VOL_STBY_VSEL	0
+#define PFUZE100_SW4VOL_STBY_VSEL_M	(0x3f<<0)
+
 #define PFUZE100_SW4OFF		76
 #define PFUZE100_SW4OFF_OFF_VAL	0x0
 #define PFUZE100_SW4OFF_OFF_M	(0x3f<<0)
@@ -339,8 +371,6 @@ static struct regulator_ops pfuze100_sw_regulator_ops;
 
  /*SWBST*/
 #define PFUZE100_SWBSTCON1	102
-#define PFUZE100_SWBSTCON1_STBY_VAL	0x0
-#define PFUZE100_SWBSTCON1_STBY_M	(0x3<<5)
 #define PFUZE100_SWBSTCON1_SWBSTMOD_VAL	(0x1<<2)
 #define PFUZE100_SWBSTCON1_SWBSTMOD_M	(0x3<<2)
 #define PFUZE100_SWBSTCON1_VSEL	0
@@ -354,8 +384,7 @@ static struct regulator_ops pfuze100_sw_regulator_ops;
 #define PFUZE100_VSNVSVOL_VSEL_M	(0x3<<0)
 /*VGEN1*/
 #define PFUZE100_VGEN1VOL		108
-#define PFUZE100_VGEN1VOL_STBY_VAL	0x0
-#define PFUZE100_VGEN1VOL_STBY_M	(0x1<<5)
+#define PFUZE100_VGEN1VOL_STBY	(0x1<<5)
 #define PFUZE100_VGEN1VOL_EN	(0x1<<4)
 #define PFUZE100_VGEN1VOL_VSEL	0
 #ifdef PFUZE100_FIRST_VERSION
@@ -365,8 +394,7 @@ static struct regulator_ops pfuze100_sw_regulator_ops;
 #endif
 /*VGEN2*/
 #define PFUZE100_VGEN2VOL		109
-#define PFUZE100_VGEN2VOL_STBY_VAL	0x0
-#define PFUZE100_VGEN2VOL_STBY_M	(0x1<<5)
+#define PFUZE100_VGEN2VOL_STBY	(0x1<<5)
 #define PFUZE100_VGEN2VOL_EN	(0x1<<4)
 #define PFUZE100_VGEN2VOL_VSEL	0
 #ifdef PFUZE100_FIRST_VERSION
@@ -376,29 +404,25 @@ static struct regulator_ops pfuze100_sw_regulator_ops;
 #endif
 /*VGEN3*/
 #define PFUZE100_VGEN3VOL		110
-#define PFUZE100_VGEN3VOL_STBY_VAL	0x0
-#define PFUZE100_VGEN3VOL_STBY_M	(0x1<<5)
+#define PFUZE100_VGEN3VOL_STBY	(0x1<<5)
 #define PFUZE100_VGEN3VOL_EN	(0x1<<4)
 #define PFUZE100_VGEN3VOL_VSEL	0
 #define PFUZE100_VGEN3VOL_VSEL_M	(0xf<<0)
 /*VGEN4*/
 #define PFUZE100_VGEN4VOL		111
-#define PFUZE100_VGEN4VOL_STBY_VAL	0x0
-#define PFUZE100_VGEN4VOL_STBY_M	(0x1<<5)
+#define PFUZE100_VGEN4VOL_STBY	(0x1<<5)
 #define PFUZE100_VGEN4VOL_EN	(0x1<<4)
 #define PFUZE100_VGEN4VOL_VSEL	0
 #define PFUZE100_VGEN4VOL_VSEL_M	(0xf<<0)
 /*VGEN5*/
 #define PFUZE100_VGEN5VOL		112
-#define PFUZE100_VGEN5VOL_STBY_VAL	0x0
-#define PFUZE100_VGEN5VOL_STBY_M	(0x1<<5)
+#define PFUZE100_VGEN5VOL_STBY	(0x1<<5)
 #define PFUZE100_VGEN5VOL_EN	(0x1<<4)
 #define PFUZE100_VGEN5VOL_VSEL	0
 #define PFUZE100_VGEN5VOL_VSEL_M	(0xf<<0)
 /*VGEN6*/
 #define PFUZE100_VGEN6VOL		113
-#define PFUZE100_VGEN6VOL_STBY_VAL	0x0
-#define PFUZE100_VGEN6VOL_STBY_M	(0x1<<5)
+#define PFUZE100_VGEN6VOL_STBY	(0x1<<5)
 #define PFUZE100_VGEN6VOL_EN	(0x1<<4)
 #define PFUZE100_VGEN6VOL_VSEL	0
 #define PFUZE100_VGEN6VOL_VSEL_M	(0xf<<0)
@@ -410,8 +434,8 @@ static struct pfuze_regulator pfuze100_regulators[] = {
 	PFUZE100_SW_DEFINE(SW3A, SW3AVOL, pfuze100_sw3),
 	PFUZE100_SW_DEFINE(SW3B, SW3BVOL, pfuze100_sw3),
 	PFUZE100_SW_DEFINE(SW4, SW4VOL, pfuze100_sw4),
-	PFUZE100_SW_DEFINE(SWBST, SWBSTCON1, pfuze100_swbst),
-	PFUZE100_SW_DEFINE(VSNVS, VSNVSVOL, pfuze100_vsnvs),
+	PFUZE100_SWBST_DEFINE(SWBST, SWBSTCON1, pfuze100_swbst),
+	PFUZE100_SWBST_DEFINE(VSNVS, VSNVSVOL, pfuze100_vsnvs),
 	PFUZE100_FIXED_VOL_DEFINE(VREFDDR, VREFDDRCON, pfuze100_vrefddr),
 	PFUZE100_VGEN_DEFINE(VGEN1, VGEN1VOL, pfuze100_vgen12),
 	PFUZE100_VGEN_DEFINE(VGEN2, VGEN2VOL, pfuze100_vgen12),
@@ -545,6 +569,36 @@ static int pfuze100_regulator_get_voltage(struct regulator_dev *rdev)
 	return pfuze100_regulators[id].voltages[val];
 }
 
+static int pfuze100_regulator_ldo_standby_enable(struct regulator_dev *rdev)
+{
+	struct pfuze_regulator_priv *priv = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	int ret;
+
+	dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
+	pfuze_lock(priv->pfuze);
+	ret = pfuze_reg_rmw(priv->pfuze, pfuze100_regulators[id].reg,
+			    pfuze100_regulators[id].stby_bit,
+			    0);
+	pfuze_unlock(priv->pfuze);
+	return ret;
+}
+
+static int pfuze100_regulator_ldo_standby_disable(struct regulator_dev *rdev)
+{
+	struct pfuze_regulator_priv *priv = rdev_get_drvdata(rdev);
+	int id = rdev_get_id(rdev);
+	int ret;
+
+	dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
+	pfuze_lock(priv->pfuze);
+	ret = pfuze_reg_rmw(priv->pfuze, pfuze100_regulators[id].reg,
+			    pfuze100_regulators[id].stby_bit,
+			    pfuze100_regulators[id].stby_bit);
+	pfuze_unlock(priv->pfuze);
+	return ret;
+}
+
 static struct regulator_ops pfuze100_ldo_regulator_ops = {
 	.enable = pfuze100_regulator_enable,
 	.disable = pfuze100_regulator_disable,
@@ -552,6 +606,8 @@ static struct regulator_ops pfuze100_ldo_regulator_ops = {
 	.list_voltage = pfuze100_regulator_list_voltage,
 	.set_voltage = pfuze100_regulator_set_voltage,
 	.get_voltage = pfuze100_regulator_get_voltage,
+	.set_suspend_enable = pfuze100_regulator_ldo_standby_enable,
+	.set_suspend_disable = pfuze100_regulator_ldo_standby_disable,
 };
 
 static int pfuze100_fixed_regulator_set_voltage(struct regulator_dev *rdev,
@@ -591,11 +647,45 @@ static int pfuze100_sw_regulator_is_enabled(struct regulator_dev *rdev)
 	return 1;
 }
 
+static int
+pfuze100_regulator_sw_standby_voltage(struct regulator_dev *rdev, int uV)
+{
+
+	struct pfuze_regulator_priv *priv = rdev_get_drvdata(rdev);
+	int value, id = rdev_get_id(rdev);
+	int ret;
+
+	dev_dbg(rdev_get_dev(rdev), "%s id: %d set standby: %d\n",
+		__func__, id, uV);
+	/* Find the best index */
+	value = pfuze100_get_best_voltage_index(rdev, uV, uV);
+	if (value < 0)
+		return value;
+	pfuze_lock(priv->pfuze);
+	ret = pfuze_reg_rmw(priv->pfuze, pfuze100_regulators[id].stby_reg,
+			    pfuze100_regulators[id].stby_vsel_mask,
+			    value << pfuze100_regulators[id].stby_vsel_shift);
+	pfuze_unlock(priv->pfuze);
+	return ret;
+
+}
+
+static int pfuze100_regulator_sw_standby_enable(struct regulator_dev *rdev)
+{
+	return 0;
+}
+static int pfuze100_regulator_sw_standby_disable(struct regulator_dev *rdev)
+{
+	return 0;
+}
 static struct regulator_ops pfuze100_sw_regulator_ops = {
 	.is_enabled = pfuze100_sw_regulator_is_enabled,
 	.list_voltage = pfuze100_regulator_list_voltage,
 	.set_voltage = pfuze100_regulator_set_voltage,
 	.get_voltage = pfuze100_regulator_get_voltage,
+	.set_suspend_enable = pfuze100_regulator_sw_standby_enable,
+	.set_suspend_disable = pfuze100_regulator_sw_standby_disable,
+	.set_suspend_voltage = pfuze100_regulator_sw_standby_voltage,
 };
 
 static int __devinit pfuze100_regulator_probe(struct platform_device *pdev)
diff --git a/drivers/video/mxc/Kconfig b/drivers/video/mxc/Kconfig
index 8a4a0792724f..83b094267760 100644
--- a/drivers/video/mxc/Kconfig
+++ b/drivers/video/mxc/Kconfig
@@ -61,7 +61,7 @@ config FB_MXC_SII902X
 	tristate "Si Image SII9022 DVI/HDMI Interface Chip"
 
 config FB_MXC_SII902X_ELCDIF
-	depends on FB_MXC_SYNC_PANEL && I2C
+	depends on FB_MXC_ELCDIF_FB && FB_MXC_SYNC_PANEL && I2C
 	tristate "Si Image SII9022 DVI/HDMI Interface Chip for ELCDIF FB"
 
 config FB_MXC_CH7026
diff --git a/drivers/video/mxc/mxc_elcdif_fb.c b/drivers/video/mxc/mxc_elcdif_fb.c
index 7eef316b1afe..0fd076537fb8 100644
--- a/drivers/video/mxc/mxc_elcdif_fb.c
+++ b/drivers/video/mxc/mxc_elcdif_fb.c
@@ -586,6 +586,7 @@ void mxcfb_elcdif_register_mode(const struct fb_videomode *modedb,
 
 	return;
 }
+EXPORT_SYMBOL(mxcfb_elcdif_register_mode);
 
 int mxc_elcdif_frame_addr_setup(dma_addr_t phys)
 {
diff --git a/drivers/video/mxc/mxc_epdc_fb.c b/drivers/video/mxc/mxc_epdc_fb.c
index 727c6ebc575c..2df44041e65c 100644
--- a/drivers/video/mxc/mxc_epdc_fb.c
+++ b/drivers/video/mxc/mxc_epdc_fb.c
@@ -1166,6 +1166,8 @@ static void epdc_init_sequence(struct mxc_epdc_fb_data *fb_data)
 	fb_data->in_init = true;
 	epdc_powerup(fb_data);
 	draw_mode0(fb_data);
+	/* Force power down event */
+	fb_data->powering_down = true;
 	epdc_powerdown(fb_data);
 	fb_data->updates_active = false;
 }
diff --git a/drivers/video/mxc/mxcfb_seiko_wvga.c b/drivers/video/mxc/mxcfb_seiko_wvga.c
index c96238d80cb2..6e9abaf8566b 100644
--- a/drivers/video/mxc/mxcfb_seiko_wvga.c
+++ b/drivers/video/mxc/mxcfb_seiko_wvga.c
@@ -89,11 +89,6 @@ static int lcd_fb_event(struct notifier_block *nb, unsigned long val, void *v)
 		return 0;
 
 	switch (val) {
-	case FB_EVENT_FB_REGISTERED:
-		lcd_init_fb(event->info);
-		fb_show_logo(event->info, 0);
-		lcd_poweron();
-		break;
 	case FB_EVENT_BLANK:
 		if ((event->info->var.xres != 800) ||
 		    (event->info->var.yres != 480)) {
diff --git a/include/linux/i2c/mpr.h b/include/linux/i2c/mpr.h
deleted file mode 100644
index ded00db775f3..000000000000
--- a/include/linux/i2c/mpr.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
- */
-
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
-
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* mpr.h - Header file for Freescale MPR121 Capacitive Touch Sensor Controllor */
-
-#ifndef MPR_H
-#define MPR_H
-
-/* Register definitions */
-#define ELE_TOUCH_STATUS_0_ADDR	0x0
-#define ELE_TOUCH_STATUS_1_ADDR	0X1
-#define MHD_RISING_ADDR		0x2b
-#define NHD_RISING_ADDR		0x2c
-#define NCL_RISING_ADDR		0x2d
-#define FDL_RISING_ADDR		0x2e
-#define MHD_FALLING_ADDR	0x2f
-#define NHD_FALLING_ADDR	0x30
-#define NCL_FALLING_ADDR	0x31
-#define FDL_FALLING_ADDR	0x32
-#define ELE0_TOUCH_THRESHOLD_ADDR	0x41
-#define ELE0_RELEASE_THRESHOLD_ADDR	0x42
-/* ELE0...ELE11's threshold will set in a loop */
-#define AFE_CONF_ADDR			0x5c
-#define FILTER_CONF_ADDR		0x5d
-
-/* ELECTRODE_CONF: this register is most important register, it
- * control how many of electrode is enabled. If you set this register
- * to 0x0, it make the sensor going to suspend mode. Other value(low
- * bit is non-zero) will make the sensor into Run mode.  This register
- * should be write at last.
- */
-#define ELECTRODE_CONF_ADDR		0x5e
-#define AUTO_CONFIG_CTRL_ADDR		0x7b
-/* AUTO_CONFIG_USL: Upper Limit for auto baseline search, this
- * register is related to VDD supplied on your board, the value of
- * this register is calc by EQ: `((VDD-0.7)/VDD) * 256`.
- * AUTO_CONFIG_LSL: Low Limit of auto baseline search. This is 65% of
- * USL AUTO_CONFIG_TL: The Traget Level of auto baseline search, This
- * is 90% of USL  */
-#define AUTO_CONFIG_USL_ADDR		0x7d
-#define AUTO_CONFIG_LSL_ADDR		0x7e
-#define AUTO_CONFIG_TL_ADDR		0x7f
-
-/* Threshold of touch/release trigger */
-#define TOUCH_THRESHOLD			0x0f
-#define RELEASE_THRESHOLD		0x0a
-/* Mask Button bits of STATUS_0 & STATUS_1 register */
-#define TOUCH_STATUS_MASK		0xfff
-/* MPR121 have 12 electrodes */
-#define MPR121_MAX_KEY_COUNT		12
-
-
-/**
- * @keycount: how many key maped
- * @vdd_uv: voltage of vdd supply the chip in uV
- * @matrix: maxtrix of keys
- * @wakeup: can key wake up system.
- */
-struct mpr121_platform_data {
-	u16 keycount;
-	u16 *matrix;
-	int wakeup;
-	int vdd_uv;
-};
-
-#endif
diff --git a/sound/soc/codecs/mxc_spdif.c b/sound/soc/codecs/mxc_spdif.c
index c80eed6d80d3..33b23371ea58 100644
--- a/sound/soc/codecs/mxc_spdif.c
+++ b/sound/soc/codecs/mxc_spdif.c
@@ -849,13 +849,21 @@ static int mxc_pb_spdif_get(struct snd_kcontrol *kcontrol,
 static int mxc_pb_spdif_put(struct snd_kcontrol *kcontrol,
 			    struct snd_ctl_elem_value *uvalue)
 {
+	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
+	struct mxc_spdif_priv *spdif_priv = snd_soc_codec_get_drvdata(codec);
+	struct mxc_spdif_platform_data *plat_data = spdif_priv->plat_data;
+
 	mxc_spdif_control.ch_status[0] = uvalue->value.iec958.status[0];
 	mxc_spdif_control.ch_status[1] = uvalue->value.iec958.status[1];
 	mxc_spdif_control.ch_status[2] = uvalue->value.iec958.status[2];
 	mxc_spdif_control.ch_status[3] = uvalue->value.iec958.status[3];
 
+	clk_enable(plat_data->spdif_clk);
+
 	spdif_write_channel_status();
 
+	clk_disable(plat_data->spdif_clk);
+
 	return 0;
 }
 
diff --git a/sound/soc/imx/Makefile b/sound/soc/imx/Makefile
index adeef06f3c7f..cc0a7d997609 100644
--- a/sound/soc/imx/Makefile
+++ b/sound/soc/imx/Makefile
@@ -1,7 +1,7 @@
 # i.MX Platform Support
-snd-soc-imx-objs := imx-ssi.o imx-esai.o
+snd-soc-imx-objs := imx-ssi.o imx-esai.o imx-hdmi-dai.o hdmi_pcm.o
 snd-soc-imx-fiq-objs := imx-pcm-fiq.o
-snd-soc-imx-mx2-objs := imx-pcm-dma-mx2.o
+snd-soc-imx-mx2-objs := imx-pcm-dma-mx2.o imx-hdmi-dma.o
 snd-soc-imx-spdif-dai-objs := imx-spdif-dai.o
 
 obj-$(CONFIG_SND_IMX_SOC) += snd-soc-imx.o
@@ -20,7 +20,7 @@ snd-soc-imx-sgtl5000-objs := imx-sgtl5000.o
 snd-soc-imx-cs42888-objs := imx-cs42888.o
 snd-soc-imx-spdif-objs := imx-spdif.o
 snd-soc-imx-si4763-objs := imx-si4763.o
-snd-soc-imx-hdmi-objs := imx-hdmi.o imx-hdmi-dai.o imx-hdmi-dma.o hdmi_pcm.o
+snd-soc-imx-hdmi-objs := imx-hdmi.o
 
 obj-$(CONFIG_SND_SOC_EUKREA_TLV320) += snd-soc-eukrea-tlv320.o
 obj-$(CONFIG_SND_SOC_PHYCORE_AC97) += snd-soc-phycore-ac97.o
diff --git a/sound/soc/imx/imx-hdmi-dma.c b/sound/soc/imx/imx-hdmi-dma.c
index 8ada80e0cc74..a19dd3bf1465 100644
--- a/sound/soc/imx/imx-hdmi-dma.c
+++ b/sound/soc/imx/imx-hdmi-dma.c
@@ -119,6 +119,7 @@ void hdmi_dma_copy_24_neon_fast(unsigned int *src, unsigned int *dst,
 			int samples);
 
 hdmi_audio_header_t iec_header;
+EXPORT_SYMBOL(iec_header);
 
 /*
  * Note that the period size for DMA != period size for ALSA because the
diff --git a/sound/soc/imx/imx-wm8962.c b/sound/soc/imx/imx-wm8962.c
index b13f68f2647b..04aca39ab2d5 100644
--- a/sound/soc/imx/imx-wm8962.c
+++ b/sound/soc/imx/imx-wm8962.c
@@ -324,25 +324,25 @@ static int imx_wm8962_init(struct snd_soc_pcm_runtime *rtd)
 	snd_soc_dapm_sync(&codec->dapm);
 
 	if (plat->hp_gpio != -1) {
-			priv->hp_irq = gpio_to_irq(plat->hp_gpio);
-
-			ret = request_irq(priv->hp_irq,
-						imx_headphone_detect_handler,
-						IRQ_TYPE_EDGE_BOTH, pdev->name, priv);
-
-			if (ret < 0) {
-				ret = -EINVAL;
-				return ret;
-			}
-
-			ret = driver_create_file(pdev->dev.driver,
-							&driver_attr_headphone);
-			if (ret < 0) {
-				ret = -EINVAL;
-				return ret;
-			}
+		priv->hp_irq = gpio_to_irq(plat->hp_gpio);
+
+		ret = request_irq(priv->hp_irq,
+					imx_headphone_detect_handler,
+					IRQ_TYPE_EDGE_BOTH, pdev->name, priv);
+
+		if (ret < 0) {
+			ret = -EINVAL;
+			return ret;
 		}
 
+		ret = driver_create_file(pdev->dev.driver,
+						&driver_attr_headphone);
+		if (ret < 0) {
+			ret = -EINVAL;
+			return ret;
+		}
+	}
+
 	if (plat->mic_gpio != -1) {
 		priv->amic_irq = gpio_to_irq(plat->mic_gpio);
 
@@ -447,12 +447,16 @@ static int __devinit imx_wm8962_probe(struct platform_device *pdev)
 static int __devexit imx_wm8962_remove(struct platform_device *pdev)
 {
 	struct mxc_audio_platform_data *plat = pdev->dev.platform_data;
-
-	plat->clock_enable(0);
+	struct imx_priv *priv = &card_priv;
 
 	if (plat->finit)
 		plat->finit();
 
+	if (priv->hp_irq)
+		free_irq(priv->hp_irq, priv);
+	if (priv->amic_irq)
+		free_irq(priv->amic_irq, priv);
+
 	return 0;
 }