diff options
| author | Pavan Kunapuli <pkunapuli@nvidia.com> | 2014-03-24 12:06:57 +0530 |
|---|---|---|
| committer | Manish Tuteja <mtuteja@nvidia.com> | 2014-03-25 23:47:12 -0700 |
| commit | 5376024d893cde40f451a11348db223cec9ca8d2 (patch) | |
| tree | 8fda9e335cf82cc41319b8296e43160823fb33b2 | |
| parent | 29f344d9967c751ba78f4613c063a32d79b441cb (diff) | |
mmc: tegra: Use SDR104 UHS mode for SDR50 mode
Program SDR104 mode in the UHS_MODE_SEL register for SDR50 mode as well.
This is required for better timing and reliable transfers in SDR50 mode.
Bug 1486268
Change-Id: Iedeabbfa8d39bfcb1e111e65f09f5ca6b36bdb9b
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/385853
Tested-by: Ankita Garg <ankitag@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
| -rw-r--r-- | drivers/mmc/host/sdhci-tegra.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index e37347005b57..cbcd7700c20a 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c @@ -411,8 +411,6 @@ static int tegra_sdhci_set_uhs_signaling(struct sdhci_host *host, ctrl_2 |= SDHCI_CTRL_UHS_SDR25; break; case MMC_TIMING_UHS_SDR50: - ctrl_2 |= SDHCI_CTRL_UHS_SDR50; - break; case MMC_TIMING_UHS_SDR104: case MMC_TIMING_MMC_HS200: ctrl_2 |= SDHCI_CTRL_UHS_SDR104; |