diff options
| author | JC Kuo <jckuo@nvidia.com> | 2013-10-04 19:26:27 +0800 |
|---|---|---|
| committer | Harry Hong <hhong@nvidia.com> | 2014-01-23 23:52:07 -0800 |
| commit | 3ab0d8dc099dc3429af1025b684131120078b873 (patch) | |
| tree | bba7a63deb33b9b5cef6f705078e9074f309e469 | |
| parent | cf54221b42efdc07eff77449ae420bf2c5514e81 (diff) | |
xhci: tegra: support override fused hs_curr_level
This change add the capability to override hs_curr_level value read
from usb_calib0 fuse register. Some board designs need different
hs_curr_level value to optimize USB 2.0 signals.
bug 1340062
Change-Id: Ic2435dc1b8c85bea507144558267b8bd29c2dad0
Reviewed-on: http://git-master/r/281745
(cherry picked from commit 938d7343c0f835772aa0f50c9df6cb32ba6b0345)
Conflicts:
arch/arm/mach-tegra/include/mach/xusb.h
Change-Id: I611dc365c27caad14d17cb95e4e0d469ec03cc62
Signed-off-by: JC Kuo <jckuo@nvidia.com>
Reviewed-on: http://git-master/r/358216
Reviewed-by: WK Tsai <wtsai@nvidia.com>
Reviewed-by: Joy Wang <joyw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Henry Lin <henryl@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/xusb.h | 12 | ||||
| -rw-r--r-- | drivers/usb/host/xhci-tegra.c | 10 |
2 files changed, 18 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/include/mach/xusb.h b/arch/arm/mach-tegra/include/mach/xusb.h index e304bb47ce8a..8270e3a6c6f5 100644 --- a/arch/arm/mach-tegra/include/mach/xusb.h +++ b/arch/arm/mach-tegra/include/mach/xusb.h @@ -30,8 +30,10 @@ #define TEGRA_XUSB_SS_P0 (1 << 0) #define TEGRA_XUSB_SS_P1 (1 << 1) #define XUSB_SS_PORT_COUNT (2) -#define TEGRA_XUSB_USB2_P0 (1 << 8) -#define TEGRA_XUSB_USB2_P1 (1 << 9) +#define XUSB_UTMI_COUNT (2) +#define XUSB_UTMI_INDEX (8) +#define TEGRA_XUSB_USB2_P0 BIT(XUSB_UTMI_INDEX) +#define TEGRA_XUSB_USB2_P1 BIT(XUSB_UTMI_INDEX + 1) #define TEGRA_XUSB_HSIC_P0 (1 << 16) #define TEGRA_XUSB_HSIC_P1 (1 << 17) #define TEGRA_XUSB_ULPI_P0 (1 << 24) @@ -42,6 +44,11 @@ #define TEGRA_XUSB_ULPI_PORT_CAP_MASTER (0x0) #define TEGRA_XUSB_ULPI_PORT_CAP_PHY (0x1) +struct tegra_xusb_utmi_config { + u8 hs_curr_level; + bool hs_curr_level_override; /* override value from usb_calib0 fuse */ +}; + struct tegra_xusb_board_data { u32 portmap; /* @@ -51,6 +58,7 @@ struct tegra_xusb_board_data { u8 ss_portmap; u8 ulpicap; void (*set_vbus_en1_tristate)(bool on); + struct tegra_xusb_utmi_config utmi[XUSB_UTMI_COUNT]; }; struct tegra_xusb_platform_data { diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index f7efbce73077..e76b85931320 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -1581,8 +1581,14 @@ static void tegra_xhci_program_utmip_pad(struct tegra_xhci_hcd *tegra, USB2_OTG_PD | USB2_OTG_PD2 | USB2_OTG_PD_ZI); reg |= tegra->pdata->hs_slew; reg |= port ? 0 : tegra->pdata->ls_rslew; - reg |= port ? tegra->pdata->hs_curr_level_pad1 : - tegra->pdata->hs_curr_level_pad0; + + reg &= ~HS_CURR_LEVEL(~0); + if (tegra->bdata->utmi[port].hs_curr_level_override) + reg |= HS_CURR_LEVEL(tegra->bdata->utmi[port].hs_curr_level); + else { + reg |= port ? tegra->pdata->hs_curr_level_pad1 : + tegra->pdata->hs_curr_level_pad0; + } writel(reg, tegra->padctl_base + ctl0_offset); reg = readl(tegra->padctl_base + ctl1_offset); |