diff options
| author | Martin Chi <mchi@nvidia.com> | 2014-01-27 13:48:50 +0800 |
|---|---|---|
| committer | Martin Chi <mchi@nvidia.com> | 2014-01-27 06:43:34 -0800 |
| commit | 15a23b223540f6a580cc1bcbf303cdd12dd791df (patch) | |
| tree | 6abd67bec50b497e8d393b8c43dc26334ebac1bf | |
| parent | 00d468c2aa1e56757146c3d188dbb506015d7cf2 (diff) | |
ARM: tegra: clock: Use ram code for TegraNote7C
TegraNote7C supports two different DDRs:
RAM_CODE[1:0] = 0x00 -> Micron DDR3L 1GB
RAM_CODE[1:0] = 0x01 -> Hynix DDR3L 1GB
Bug 1438727
Change-Id: Ib4b6f2d38b2667dea1167417ba84388f9739414e
Signed-off-by: Martin Chi <mchi@nvidia.com>
Reviewed-on: http://git-master/r/360204
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Danny Song <dsong@nvidia.com>
GVS: Gerrit_Virtual_Submit
| -rw-r--r-- | arch/arm/mach-tegra/tegra11_emc.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/tegra11_emc.c b/arch/arm/mach-tegra/tegra11_emc.c index bd623f5c0336..c2d321c652c4 100644 --- a/arch/arm/mach-tegra/tegra11_emc.c +++ b/arch/arm/mach-tegra/tegra11_emc.c @@ -1154,8 +1154,11 @@ static struct device_node *tegra_emc_ramcode_devnode(struct device_node *np) if (reg == 0x0) return of_node_get(iter); } else if (board_info.board_id == BOARD_P1988) { - /* force select ram strapping 0x0 */ - if (reg == 0x0) + /* + * RAM_CODE[1:0] = 0x00 -> Micron DDR3L 1GB + * RAM_CODE[1:0] = 0x01 -> Hynix DDR3L 1GB + */ + if (reg == tegra_bct_strapping) return of_node_get(iter); } } |