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authorShengjiu Wang <shengjiu.wang@freescale.com>2014-09-09 17:13:27 +0800
committerShawn Guo <shawn.guo@freescale.com>2014-09-16 10:27:17 +0800
commit50a8835b9caf40c08b1c7ad440946dd2b6c3eb6a (patch)
tree47a6f3f6ac32536e41f3a858b224a8be1af7c003
parent935632e9938e3e286b9c62a7e54d35c428533cc9 (diff)
ARM: dts: imx6sl: add baud clock and clock-names for ssi
Baud clock is used for bit clock generation in master mode. Ipg clock is peripheral clock and peripheral access clock. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi12
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index ba6771445239..dfd83e6d8087 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -231,7 +231,9 @@
"fsl,imx51-ssi";
reg = <0x02028000 0x4000>;
interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_SSI1>;
+ clocks = <&clks IMX6SL_CLK_SSI1_IPG>,
+ <&clks IMX6SL_CLK_SSI1>;
+ clock-names = "ipg", "baud";
dmas = <&sdma 37 1 0>,
<&sdma 38 1 0>;
dma-names = "rx", "tx";
@@ -245,7 +247,9 @@
"fsl,imx51-ssi";
reg = <0x0202c000 0x4000>;
interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_SSI2>;
+ clocks = <&clks IMX6SL_CLK_SSI2_IPG>,
+ <&clks IMX6SL_CLK_SSI2>;
+ clock-names = "ipg", "baud";
dmas = <&sdma 41 1 0>,
<&sdma 42 1 0>;
dma-names = "rx", "tx";
@@ -259,7 +263,9 @@
"fsl,imx51-ssi";
reg = <0x02030000 0x4000>;
interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6SL_CLK_SSI3>;
+ clocks = <&clks IMX6SL_CLK_SSI3_IPG>,
+ <&clks IMX6SL_CLK_SSI3>;
+ clock-names = "ipg", "baud";
dmas = <&sdma 45 1 0>,
<&sdma 46 1 0>;
dma-names = "rx", "tx";