diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2017-03-03 19:34:53 -0800 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2017-04-03 15:36:39 +0200 |
| commit | 98adbbaef78b8a401350a0bf27c3ddc1881ec34d (patch) | |
| tree | 0647f2181ff3be4cb1a151e173f049780970c0d5 | |
| parent | 9e05354060550645ad21a0455468e142c7fdb201 (diff) | |
ARM: imx: clk: do not force clock frequency of M4
Let the M4 handle the clock frequency by itself. We also don't need
to take care to make sure clocks stay on, the per domain CCM clock
gate control registers can be used to let the CCM know that the M4
runs on that PLL:
CCM_ControlGate(CCM, ccmPllGateSysDiv2, ccmClockNeededRun);
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| -rw-r--r-- | arch/arm/mach-imx/clk-imx7d.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/mach-imx/clk-imx7d.c b/arch/arm/mach-imx/clk-imx7d.c index 4b0abd18d74f..ae8d7a648f81 100644 --- a/arch/arm/mach-imx/clk-imx7d.c +++ b/arch/arm/mach-imx/clk-imx7d.c @@ -886,11 +886,6 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) clk_prepare_enable(clks[clks_init_on[i]]); - if (imx_src_is_m4_enabled()) { - imx_clk_set_parent(clks[IMX7D_ARM_M4_ROOT_SRC], clks[IMX7D_PLL_SYS_MAIN_240M_CLK]); - imx_clk_prepare_enable(clks[IMX7D_ARM_M4_ROOT_CLK]); - } - imx_clk_set_parent(clks[IMX7D_PLL_ARM_MAIN_BYPASS], clks[IMX7D_PLL_ARM_MAIN]); imx_clk_set_parent(clks[IMX7D_PLL_DRAM_MAIN_BYPASS], clks[IMX7D_PLL_DRAM_MAIN]); imx_clk_set_parent(clks[IMX7D_PLL_SYS_MAIN_BYPASS], clks[IMX7D_PLL_SYS_MAIN]); |