diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2019-04-16 13:30:52 +0200 |
|---|---|---|
| committer | Max Krummenacher <max.krummenacher@toradex.com> | 2019-04-17 09:48:58 +0200 |
| commit | f4c799cd48448a8d880212cc2e06f362f423df91 (patch) | |
| tree | 8386b57ddc7207a9c7ad6506813ef4b54e9daae3 | |
| parent | 5e14548db96a9bc5346247c0d82468ce0f91e301 (diff) | |
ARM: dts: imx8: apalis-imx8qm: unify apalis gpio pinctrl
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts | 29 |
1 files changed, 17 insertions, 12 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts index b4f5dc07e7a3..d9293e2f1788 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts @@ -170,7 +170,7 @@ >; }; - pinctrl_cam: camgrp { + pinctrl_gpio12: gpio12grp { fsl,pins = < /* Apalis GPIO1 */ SC_P_M40_GPIO0_00_LSIO_GPIO0_IO08 0x06000021 @@ -197,6 +197,20 @@ >; }; + pinctrl_gpio7: gpio7 { + fsl,pins = < + /* Apalis GPIO7 */ + SC_P_MLB_SIG_LSIO_GPIO3_IO26 0x00000021 + >; + }; + + pinctrl_gpio8: gpio8 { + fsl,pins = < + /* Apalis GPIO8 */ + SC_P_MLB_DATA_LSIO_GPIO3_IO28 0x00000021 + >; + }; + pinctrl_wake1_mico: wake1micogrp { fsl,pins = < /* Apalis WAKE1_MICO */ @@ -583,8 +597,6 @@ fsl,pins = < SC_P_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28 0x00000021 SC_P_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29 0x00000021 - /* Apalis GPIO7 */ - SC_P_MLB_SIG_LSIO_GPIO3_IO26 0x00000021 >; }; @@ -630,13 +642,6 @@ >; }; - pinctrl_gpio8: gpio8 { - fsl,pins = < - /* Apalis GPIO8 */ - SC_P_MLB_DATA_LSIO_GPIO3_IO28 0x00000021 - >; - }; - pinctrl_usb3503a: usb3503agrp { fsl,pins = < SC_P_SCU_GPIO0_03_LSIO_GPIO0_IO31 0x00000021 @@ -894,7 +899,7 @@ ov5640_mipi@3c { compatible = "ovti,ov5640_mipi"; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_cam>; + pinctrl-0 = <&pinctrl_gpio12>; reg = <0x3c>; pwn-gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; rst-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; @@ -1175,7 +1180,7 @@ &pciea{ ext_osc = <1>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pciea>; + pinctrl-0 = <&pinctrl_pciea &pinctrl_gpio7>; clocks = <&clk IMX8QM_HSIO_PCIE_A_MSTR_AXI_CLK>, <&clk IMX8QM_HSIO_PCIE_A_SLV_AXI_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_0>, |