diff options
| author | Troy Kisky <troy.kisky@boundarydevices.com> | 2013-02-18 16:14:07 -0700 |
|---|---|---|
| committer | Troy Kisky <troy.kisky@boundarydevices.com> | 2013-02-19 18:45:46 -0700 |
| commit | b4b0bbad31a089aa4dc01daf5e428cf9aa0cd3a5 (patch) | |
| tree | b48edd18bfa1e1b9017f1d51f68c80cae03d92b0 | |
| parent | f8b5a574330042fd750294ea524be689dda4d792 (diff) | |
pads-mx6_sabrelite: sdhc4 iomux setting copy-n-paste bug
| -rw-r--r-- | arch/arm/mach-mx6/pads-mx6_sabrelite.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/mach-mx6/pads-mx6_sabrelite.h b/arch/arm/mach-mx6/pads-mx6_sabrelite.h index e2693153c710..69c568ea048c 100644 --- a/arch/arm/mach-mx6/pads-mx6_sabrelite.h +++ b/arch/arm/mach-mx6/pads-mx6_sabrelite.h @@ -16,12 +16,12 @@ #define MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 MX6Q_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ #define MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 MX6Q_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ #define MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 MX6Q_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ -#define MX6Q_PAD_SD4_CLK__USDHC4_CLK MX6Q_PAD_SD3_CLK__USDHC3_CLK_50MHZ -#define MX6Q_PAD_SD4_CMD__USDHC4_CMD MX6Q_PAD_SD3_CMD__USDHC3_CMD_50MHZ -#define MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 MX6Q_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ -#define MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 MX6Q_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ -#define MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 MX6Q_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ -#define MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 MX6Q_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ +#define MX6Q_PAD_SD4_CLK__USDHC4_CLK MX6Q_PAD_SD4_CLK__USDHC4_CLK_50MHZ +#define MX6Q_PAD_SD4_CMD__USDHC4_CMD MX6Q_PAD_SD4_CMD__USDHC4_CMD_50MHZ +#define MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 MX6Q_PAD_SD4_DAT0__USDHC4_DAT0_50MHZ +#define MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 MX6Q_PAD_SD4_DAT1__USDHC4_DAT1_50MHZ +#define MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 MX6Q_PAD_SD4_DAT2__USDHC4_DAT2_50MHZ +#define MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 MX6Q_PAD_SD4_DAT3__USDHC4_DAT3_50MHZ #define MX6DL_PAD_SD3_CLK__USDHC3_CLK MX6DL_PAD_SD3_CLK__USDHC3_CLK_50MHZ #define MX6DL_PAD_SD3_CMD__USDHC3_CMD MX6DL_PAD_SD3_CMD__USDHC3_CMD_50MHZ @@ -29,12 +29,12 @@ #define MX6DL_PAD_SD3_DAT1__USDHC3_DAT1 MX6DL_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ #define MX6DL_PAD_SD3_DAT2__USDHC3_DAT2 MX6DL_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ #define MX6DL_PAD_SD3_DAT3__USDHC3_DAT3 MX6DL_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ -#define MX6DL_PAD_SD4_CLK__USDHC4_CLK MX6DL_PAD_SD3_CLK__USDHC3_CLK_50MHZ -#define MX6DL_PAD_SD4_CMD__USDHC4_CMD MX6DL_PAD_SD3_CMD__USDHC3_CMD_50MHZ -#define MX6DL_PAD_SD4_DAT0__USDHC4_DAT0 MX6DL_PAD_SD3_DAT0__USDHC3_DAT0_50MHZ -#define MX6DL_PAD_SD4_DAT1__USDHC4_DAT1 MX6DL_PAD_SD3_DAT1__USDHC3_DAT1_50MHZ -#define MX6DL_PAD_SD4_DAT2__USDHC4_DAT2 MX6DL_PAD_SD3_DAT2__USDHC3_DAT2_50MHZ -#define MX6DL_PAD_SD4_DAT3__USDHC4_DAT3 MX6DL_PAD_SD3_DAT3__USDHC3_DAT3_50MHZ +#define MX6DL_PAD_SD4_CLK__USDHC4_CLK MX6DL_PAD_SD4_CLK__USDHC4_CLK_50MHZ +#define MX6DL_PAD_SD4_CMD__USDHC4_CMD MX6DL_PAD_SD4_CMD__USDHC4_CMD_50MHZ +#define MX6DL_PAD_SD4_DAT0__USDHC4_DAT0 MX6DL_PAD_SD4_DAT0__USDHC4_DAT0_50MHZ +#define MX6DL_PAD_SD4_DAT1__USDHC4_DAT1 MX6DL_PAD_SD4_DAT1__USDHC4_DAT1_50MHZ +#define MX6DL_PAD_SD4_DAT2__USDHC4_DAT2 MX6DL_PAD_SD4_DAT2__USDHC4_DAT2_50MHZ +#define MX6DL_PAD_SD4_DAT3__USDHC4_DAT3 MX6DL_PAD_SD4_DAT3__USDHC4_DAT3_50MHZ #define NP(id, speed, pin) \ NEW_PAD_CTRL(MX6PAD(SD##id##_##pin##__USDHC##id##_##pin), \ |